Package Designer - San Jose, CA, United States
$110,000 - $155,000 USD yearly
Originally posted 24 September 2026 by the employer.
About the role
You will collaborate with PCB, SI/PI, thermal, and manufacturing teams to deliver robust, manufacturable, and cost-effective package solutions, specifically focusing on 2.5D/3D heterogeneous integration with High Bandwidth Memory (HBM).
What you'll do
- Design and layout advanced semiconductor packages including Flip Chip, BGA, LGA, 2.5D/3D heterogeneous integration with High Bandwidth Memory (HBM).
- Use EDA tools (Cadence Allegro/Virtuoso/Innovus, Siemens Xpedition, Synopsys 3D-ICC etc.) to create and verify package layouts.
- Perform design and what-if scenario analysis for novel advanced packaging schemes to improve system-in-package (SIP) performance.
- Create and maintain design rules, stack-ups, and layout guidelines.
- Collaborate with internal and external stakeholders to ensure seamless advanced packaging technology development.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field.
- 3+ years of experience in semiconductor package design or layout.
- Proven experience with package layout tools (Cadence Allegro/Virtuoso/Innovus, Siemens Xpedition, Synopsys 3D-ICC, Autocad or equivalent).
- Strong understanding of high-speed signal routing and power distribution networks (PDN).
- In-depth knowledge in 2.5D/3D packaging technologies, substrate design rules, and large body substrate technologies.
Nice to have
- PhD's degree in Electrical Engineering or a related field.
- 5+ years of experience in advanced packaging technology development and manufacturing.
- Experience with SI/PI simulation tools (Ansys, HFSS, ADS).
- Technical understanding of advanced packaging materials, their interactions, failure mechanisms and analytical techniques.
Skills: 2.5D/3D heterogeneous integration, HBM, package layout tools, high-speed signal routing, power distribution networks
This role has been open 2 days — well below the 39-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
69
|
Median days open
39 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SK Hynix America | All employers we track in this specialty (69 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 69 |
| Median days open | 92 d | 39 d (+53 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Skills observed across this category: 2.5D/3D heterogeneous integration, HBM, package layout tools, high-speed signal routing, power distribution networks
Who's hiring in this category
- Micron Technology · 12 open roles · median 149 d
- AMD · 6 open roles · median 33 d
- Marvell Technology · 6 open roles · median 19 d
- Broadcom · 5 open roles · median 169 d
- Amazon · 4 open roles · median 18 d
- Intel Corporation · 4 open roles · median 9 d
How we counted: 69 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 25 employers tracked in the SemiconductorJobs index, counted 27 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.