Package Design Staff/Sr.Staff Engineer - Bangalore, India

Originally posted 10 September 2026 by the employer — open 0 days.

About the role

This role involves the development of advanced microelectronic packages from concept through tapeout.

What you'll do

• Develop C4 and BGA ball maps optimized for SI/PI and layout efficiency.
• Plan and validate netlist mappings across dies, interposers, and substrates.
• Define die placement, padstacks, net assignments, and package-level connectivity.
• Create and maintain Package Requirement Documents (PRDs) detailing die arrangements, stackups, and design constraints.
• Contribute to tool, process, and flow development, including library maintenance and basic scripting for automation.

What you'll need

• 5-12 years of professional experience in package development.
• Experience developing netlists and schematics for large, complex packages.
• Experience developing C4 and BGA ball maps for high-pin-count designs.
• Proficiency with design tools Cadence OrbitIO / Integrity System Planner (ISP) or equivalent.
• Strong foundational understanding of package design, including design rules, breakout, place and route, signal shielding, reference planes, power distribution, and pinout optimization.
• Solid grasp of SI/PI fundamentals at the substrate, board, and system levels.
• Knowledge of 2D, 2.5D, and emerging packaging architectures such as CoWoS-S/R/L, EMIB, CPO, and CPC.
• Familiarity with foundry design rules and substrate manufacturing constraints.
• Experience collaborating with chip and board design and electrical simulation teams to optimize package and system co-design.

Nice to have

• Familiarity with running and interpreting signal and power simulations.

Skills: advanced microelectronic packages, C4 and BGA ball maps, 2.5D, and emerging packaging architectures, CoWoS, EMIB, CPO, SI/PI fundamentals