NPU Physical Design Engineer Sr Staff - Bangalore, India
Originally posted 18 September 2026 by the employer — open 0 days.
This role focuses on PNR implementation for Qualcomm Hexagon NPU.
About the role
This role involves planning, designing, optimizing, verifying, and testing electronic systems, circuits, and equipment, with a focus on PNR implementation for Qualcomm Hexagon NPU.
What you'll do
- Complete PNR implementation (Floorplanning, Placement, CTS, post_route) on latest nodes.
- Perform signoff (STA, Power analysis, FV, low power verification, PV).
- Apply knowledge of Floorplanning, PNR, and STA flows.
- Utilize knowledge of Placement, Clock Tree Synthesis (CTS), and optimization.
- Understand signoff domains including LEC/CLP/PDN.
- Apply Unix/Linux, Perl/TCL fundamentals/scripting.
What you'll need
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field and 4+ years of Hardware Engineering or related work experience, OR Master's degree in Computer Science, Electrical/Electronics Engineering, or related field and 3+ years of Hardware Engineering or related work experience, OR PhD in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- 12 years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm).
- Hands-on experience on Floorplanning, PNR and STA flows.
- Knowledge on Placement/Clock Tree Synthesis (CTS), optimization.
- Understanding on signoff domains (LEC/CLP/PDN knowledge).
- Knowledge on Unix/Linux – Perl/TCL fundamentals/scripting.
Skills: PNR implementation, Floorplanning, Placement, Clock Tree Synthesis, STA
This role has been open 0 days — well below the 57-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
601
|
Median days open
57 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (601 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 112 | 601 |
| Open roles in the wider Physical Implementation family | 154 | 1379 · 105 employers |
| Median days open | 40 d | 57 d (−17 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: PNR implementation, Floorplanning, Placement, Clock Tree Synthesis, STA
Who's hiring in this category
- Qualcomm (this employer) · 103 open roles · median 42 d
- Broadcom · 38 open roles · median 67 d
- NVIDIA · 38 open roles · median 48 d
- AMD · 34 open roles · median 41 d
- Synopsys · 28 open roles · median 57 d
- Renesas Electronics · 25 open roles · median 44 d
How we counted: 601 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.