NPU Physical Design Engineer (Lead/Staff/Sr Staff) - Bangalore, India
Originally posted 23 September 2026 by the employer.
This role focuses on PNR implementation for Qualcomm Hexagon NPU.
About the role
This role involves the planning, design, optimization, verification, and testing of electronic systems as a Hardware Engineer. You will be responsible for PNR implementation for Qualcomm Hexagon NPU.
What you'll do
- Own PNR implementation (Floorplanning, Placement, CTS, post_route) on latest nodes.
- Implement physical design including Placement/Clock Tree Synthesis (CTS), and optimization.
- Apply signoff knowledge for STA, Power analysis, FV, low power verification, and PV.
- Utilize expertise in Floorplanning, PNR, and STA flows.
What you'll need
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field and 4+ years of Hardware Engineering or related work experience; OR Master's degree in Computer Science, Electrical/Electronics Engineering, or related field and 3+ years of Hardware Engineering or related work experience; OR PhD in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- 6 years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm).
- Hands-on experience on Floorplanning, PNR and STA flows.
- Knowledge of signoff domains including LEC/CLP/PDN.
- Knowledge of Unix/Linux with Perl/TCL fundamentals/scripting.
Skills: Floorplanning, PNR, STA, CTS, signoff
This role has been open 0 days — well below the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
633
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (633 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 123 | 633 |
| Open roles in the wider Physical Implementation family | 166 | 1414 · 108 employers |
| Median days open | 36 d | 61 d (−25 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Floorplanning, PNR, STA, CTS, signoff
Who's hiring in this category
- Qualcomm (this employer) · 122 open roles · median 37 d
- Broadcom · 39 open roles · median 72 d
- NVIDIA · 38 open roles · median 47 d
- AMD · 36 open roles · median 38 d
- Synopsys · 27 open roles · median 61 d
- Renesas Electronics · 25 open roles · median 49 d
How we counted: 633 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 23 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.