Member of Technical Staff - Switch Systems Test Engineer - Fremont, CA, United States
Originally posted 10 July 2026 by the employer.
Standardize and implement switch-based DVT (XDVT) test coverage for 800G, 1.6T, and 3.2T optical transceiver products.
About the role
This position is under the Open Lab team, targeting switch-based test system validation, early product evaluation, and customer engagement for optical transceivers. The role leads the standardization and implementation of Switch-based DVT (XDVT) test coverage across 800G, 1.6T, and 3.2T optical transceiver products.
What you'll do
- Lead the standardization, automation, and implementation of Switch-based DVT (XDVT) test coverage for 800G, 1.6T, and future 3.2T optical transceiver products. - Coordinate global XDVT activities and assist in failure analysis and corrective actions across multi-site design teams. - Interface directly with switch vendors, DSP vendors, and customers to co-debug system-level link stability issues. - Co-develop tuning and optimization algorithms on switch-based setups for LPO, LRO, and XPO products. - Support bring-up of switches, NIC cards, traffic generators, and optical test equipment.
What you'll need
- B.S. in Electrical Engineering or related field with 9+ years of relevant industry experience, or M.S. with 7+ years of relevant industry experience. - Demonstrated experience in optical transceiver validation, system-level debugging, and product characterization. - Hands-on experience with optical test instruments, including DCA, OSA, and BERT. - Strong optical and electrical measurement skills in a laboratory environment. - Familiarity with optical transceiver characterization and failure analysis in switch-based systems, alongside basic knowledge of IEEE test specifications. - Strong data analysis capabilities using SQL, JMP, or MS Excel.
Nice to have
- Experience working in data center networking, optical communications, or high-speed interconnect technologies. - Programming skills in Python. - Familiarity with Switch OS platforms such as SONiC, Cumulus, or VEOS. - Experience with link performance optimization on switch rack systems in data centers. - Knowledge of PCBA, RF, and fiber optics. - Capability to develop engineering engagements supporting 1.6T and 3.2T pluggable products as well as CPO/NPO lineups.
This role has been open 102 days — well below the 112-day median for Silicon Test Engineering roles.
Silicon Test Engineering · Silicon Validation
|
Open roles in category
192
|
Median days open
112 d
|
Median salary
$129k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Coherent Corp | All employers we track in this specialty (192 roles · 57 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 192 |
| Open roles in the wider Silicon Validation & Test family | 12 | 2229 · 113 employers |
| Median days open | 102 d | 112 d (−10 d vs this employer) |
| Median salary (USD postings) | — | $129k |
Who's hiring in this category
- Teradyne · 14 open roles · median 115 d
- Renesas Electronics · 12 open roles · median 103 d
- Qualcomm · 11 open roles · median 114 d
- onsemi · 10 open roles · median 136 d
- Infineon Technologies · 9 open roles · median 118 d
- Marvell Technology · 9 open roles · median 118 d
How we counted: 192 open Silicon Test Engineering (Silicon Validation) roles from 57 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.