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Apple

MAC Design Verification Engineer - Sunnyvale, United States

Apple Sunnyvale, United States 2 hours ago
Verification, Validation & Test

Originally posted 27 October 2026 by the employer.

Pre-silicon RTL verification of wireless MAC and interfaces for wireless SoC development.

About the role

Apple is seeking a MAC Design Verification Engineer to perform pre-silicon RTL verification of wireless MAC and its interfaces with the wireless SoC. The position involves collaborating with designers, communication systems engineers, and verification methodologists to build reusable testbenches using metric-driven verification.

What you'll do

- Execute pre-silicon RTL verification of wireless MAC blocks and interfaces to the wireless SoC. - Develop reusable testbenches and verification environments using metric-driven verification methodologies. - Collaborate with DV methodologists, RTL designers, and communication systems engineers. - Drive constrained random testing and code/functional coverage closure.

What you'll need

- Bachelor's degree. - Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion. - Knowledge and experience with ASIC verification flows, including test bench development, constrained random testing, and code/functional coverage. - Verification experience with one or more of the following: MAC, PHY, DMA, timer, AMBA bus and fabric, or encryption/decryption engine.

Nice to have

- 3+ years of verification experience with wireless or wired communication blocks/subsystems. - Knowledge of wireless protocols such as Bluetooth, UWB, WLAN, or Zigbee. - Proficiency in shell, Python scripting, or Perl scripting. - Experience with AI technologies in data mining/analysis. - Experience with Palladium or FPGA validation.

Skills: UVM, SystemVerilog, ASIC verification, coverage, MAC

Market context

This role has been open 0 days — well below the 64-day median for Design Verification roles.

Design Verification · Design Verification

Open roles in category
1277
Median days open
64 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Apple compares in Design Verification hiring
Metric Apple All employers we track in this specialty (1277 roles · 96 employers)
Open roles in this specialty 67 1277
Open roles in the wider Digital Design & Verification family 146 3375 · 116 employers
Median days open 7 d 64 d (−57 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: UVM, SystemVerilog, ASIC verification, coverage, MAC

Who's hiring in this category

  • Qualcomm · 112 open roles · median 42 d
  • AMD · 92 open roles · median 57 d
  • NVIDIA · 91 open roles · median 67 d
  • Synopsys · 73 open roles · median 42 d
  • SiFive · 56 open roles · median 81 d
  • Apple (this employer) · 55 open roles · median 8 d

How we counted: 1277 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apple

Apple

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Sunnyvale, United States
On-site
2 hours ago

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