Skip to main content
Rambus

Lead Mts Logic Design - Netherlands

Rambus Remote friendly (Netherlands) 3 months ago
Digital Design & SoC Architecture

Originally posted 30 July 2026 by the employer.

About the role

As a Lead Member of Technical Staff Logic Design Engineer reporting to the Director of R&D Silicon IP, you will lead the design and implementation of secure silicon IPs within the Security Business Unit.

What you'll do

  • Lead digital design engineers, manage technical project planning, and estimate development effort.
  • Define block specifications and architectures for secure silicon IP while generating technical documentation.
  • Execute RTL design, linting, clock domain crossing (CDC) analysis, synthesis, and IP release workflows.
  • Collaborate with the verification team on verification planning, simulation debugging, formal verification, and technical reviews.
  • Contribute to R&D logic design flow and methodology development across interdisciplinary teams.
  • Interface with cross-functional technical leaders, engineering teams, product management, sales, and field application engineers.

What you'll need

  • BS or MS degree in Hardware Engineering, Computing Science, or an equivalent technical field.
  • 8+ years of experience in relevant engineering positions within R&D centers or system laboratories in the security or chip industry.
  • In-depth knowledge of SoC, Silicon IP, or FPGA logic design flows.
  • In-depth knowledge of hardware description languages including Verilog, VHDL, and SystemVerilog, along with scripting languages.
  • Proven documentation skills and experience explaining complex concepts to technical audiences.

Nice to have

  • Familiarity with IP integration, IP core delivery, and handoff issues.
  • Ability to work with technical writers in the production of technical documentation.
  • In-depth knowledge of cryptography, security protocols, and security implementations.
  • Knowledge of the PCIe IDE standard.

Skills: RTL design, SystemVerilog, SoC, Silicon IP, synthesis

More semiconductor jobs: Rambus jobs · RTL design jobs

Market context

This role has been open 90 days — well above the 63-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1077
Median days open
63 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Rambus compares in Digital/RTL Design hiring
Metric Rambus All employers we track in this specialty (1077 roles · 104 employers)
Open roles in this specialty 9 1077
Open roles in the wider Digital Design & Verification family 17 3364 · 116 employers
Median days open 90 d 63 d (+27 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: RTL design, SystemVerilog, SoC, Silicon IP, synthesis

Who's hiring in this category

  • Qualcomm · 153 open roles · median 65 d
  • Synopsys · 86 open roles · median 42 d
  • AMD · 80 open roles · median 43 d
  • Analog Devices · 47 open roles · median 58 d
  • NXP Semiconductors · 44 open roles · median 97 d
  • NVIDIA · 37 open roles · median 48 d

How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Netherlands
Hybrid
3 months ago

Share this job