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NVIDIA

Lead Hardware Design Validation Engineer

NVIDIA US, CA, Santa Clara, United States Full-time 1 day ago
Digital Design & SoC Architecture

Originally posted 30 October 2026 by the employer. Relisted by the employer on 31 October 2026.

About the role

As a Lead Hardware Design Validation Engineer at NVIDIA, you will own end-to-end product validation for GPU, datacenter, and automotive platforms from architecture and design phases through bring-up to mass production.

What you'll do

  • Own end-to-end product validation strategies, define full-system test plans, and track progress across power, high-speed IO, low-speed IO, clock/resets, BMC manageability, sensors, telemetry, and firmware.
  • Lead and mentor design validation engineers while coordinating related validation teams (thermal, EMI, reliability) and partners such as JDMs.
  • Serve as the accountable technical owner for validation status, risks, and release readiness in executive and cross-functional forums.
  • Drive system-level debugging and root-cause analysis on complex issues spanning silicon, board, system, signal integrity, firmware, and software.
  • Guide manufacturing test approaches, contribute to production troubleshooting, and boost yield in collaboration with operations and CM/OEM teams.
  • Build scalable validation automation and lab infrastructure across product lines.

What you'll need

  • BS+ in EE/CE or equivalent experience.
  • 8+ years of related experience with a proven track record as a technical lead for a shipping hardware product from bring-up to mass production.
  • Strong system troubleshooting skills covering silicon, board, SI, firmware, OS, and applications.
  • Hands-on experience with power validation, including PDN, power regulators, sequencing, telemetry, and protection.
  • Expertise in high-speed IO functionality and electrical validation (such as PCIe, SerDes, Ethernet, USB, or display) and low-speed IO (including I2C, SPI, UART, JTAG, SMBus, and reference clock).
  • Experience defining and completing system-level functional and stress workloads (thermal, power, IO, memory, mixed-mode, corner V/F, Wide Area Test).
  • Proficiency with lab equipment, scripting, and Linux environments including driver and firmware debug.
  • Willingness to visit local manufacturing sites near Santa Clara (up to 5%) to support NPI builds.

More semiconductor jobs: NVIDIA jobs · Hardware design jobs · California jobs

Market context

This role has been open 144 days — well above the 45-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · AI ML Hardware

Open roles in category
1062
Median days open
45 d
Category median salary (all employers)
$154k
See the full market breakdown ▾Category comparison, and who else is hiring
How NVIDIA compares in Hardware Systems Engineering hiring
Metric NVIDIA All employers we track in this specialty (1062 roles · 100 employers)
Open roles in this specialty 55 1062
Open roles in the wider Software, Firmware & Systems family 1117 6361 · 144 employers
Median days open 66 d 45 d (+21 d vs this employer)
Median salary (USD postings) — $154k

Who's hiring in this category

  • Intel Corporation · 79 open roles · median 43 d
  • KLA Corporation · 60 open roles · median 55 d
  • Teradyne · 60 open roles · median 43 d
  • Applied Materials · 53 open roles · median 60 d
  • ASML · 48 open roles · median 27 d
  • NVIDIA (this employer) · 48 open roles · median 64 d

How we counted: 1062 open Hardware Systems Engineering (AI ML Hardware) roles from 100 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
Full-time
1 day ago

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