IP Verification Engineer - Chandler, Arizona, United States
$130,100 - $176,000 USD yearly
Originally posted 23 July 2026 by the employer.
About the role
The Solution Engineering division is seeking a verification engineer to develop testbenches and test suites for IP and subsystems. This role supports product development across Enterprise, Auto, and Client markets.
What you'll do
- Write test plans and complete functional verification to target quality levels and schedules. - Develop IP features that enable reconfigurable designs. - Partner with design engineers to review microarchitectural specifications and debug issues. - Collaborate with cross-functional teams in design and verification.
What you'll need
- Bachelor's or higher degree in Computer Science, Electrical/Computer Engineering, or a related field. - Experience verifying complex subsystems or SoCs across verification stages, including test plan creation, testbench implementation, test case development, documentation, and support. - Experience with front-end verification tools, including dynamic simulation tools, static simulation tools, UPF, and debuggers such as Questa, VCS, Jasper Gold, or Verdi. - Hands-on experience with coverage closure, including functional, toggle, and code coverage. - Experience with reconfigurable IP and subsystem design.
Nice to have
- Object-oriented programming concepts. - Experience with ARM-based designs or ARM System Architectures. - Understanding of OTP/Fuse usage models and JTAG/TAP protocols. - Scripting experience in Perl, Python, or another scripting language. - Experience with SoC system debug methodologies. - Knowledge of DFT methodologies, including RTL testability, scan insertion, and OCC.
Skills: test plans, functional verification, testbench implementation, dynamic simulation tools, functional coverage
This role has been open 120 days — well above the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1233
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (1233 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 49 | 1233 |
| Open roles in the wider Digital Design & Verification family | 104 | 3298 · 115 employers |
| Median days open | 107 d | 64 d (+43 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: test plans, functional verification, testbench implementation, dynamic simulation tools, functional coverage
Who's hiring in this category
- Qualcomm · 115 open roles · median 41 d
- AMD · 93 open roles · median 51 d
- NVIDIA · 84 open roles · median 62 d
- Synopsys · 66 open roles · median 37 d
- SiFive · 55 open roles · median 79 d
- Cadence Design Systems · 51 open roles · median 121 d
How we counted: 1233 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.