Intern, SRAM Design Engineer
Originally posted 30 October 2026 by the employer.
About the role
The SRAM Lab is seeking an intern to support the development, simulation, and optimization of SRAM circuits. In this role, you will contribute across architecture, schematic design, and silicon-level verification to meet power, performance, and area (PPA) requirements for AI and mobile ecosystems.
What you'll do
- Assist in the design and simulation of SRAM circuits using industry-standard EDA tools.
- Perform transistor-level schematic design for SRAM bitcell, sense amplifiers, and peripheral circuits.
- Conduct simulations to verify functionality, timing, power, and reliability of SRAM design.
- Document design processes, simulation results, and findings in technical reports or presentations.
- Study SRAM compiler flow, bitcell architectures, and write/read operations through simulation and debug.
What you'll need
- Currently pursuing a degree in Electrical or Electronic Engineering with at least 1 academic quarter or semester remaining.
- Basic understanding of CMOS circuit design and semiconductor devices physics.
- Experience with EDA tools such as Cadence Virtuoso, hspice, finesim, and spectre.
- Proficiency in scripting languages such as Python, Perl, or TCL.
Nice to have
- Pursuing a Master's or PhD in Electrical or Electronic Engineering.
- Familiarity with SRAM or memory design concepts.
Skills: SRAM, bitcell, compiler, Virtuoso, hspice
More semiconductor jobs: Samsung Semiconductor jobs · San Jose jobs
This role has been open 0 days — well below the 71-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
322
|
Median days open
71 d
|
Category median salary (all employers)
$200k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (322 roles · 30 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 322 |
| Median days open | 22 d | 71 d (−49 d vs this employer) |
| Median salary (USD postings) | — | $200k |
Skills observed across this category: SRAM, bitcell, compiler, Virtuoso, hspice
Who's hiring in this category
- Micron Technology · 170 open roles · median 82 d
- Synopsys · 32 open roles · median 70 d
- Qualcomm · 19 open roles · median 91 d
- SanDisk · 17 open roles · median 57 d
- Broadcom · 16 open roles · median 71 d
- Arm Holdings · 7 open roles · median 2 d
How we counted: 322 open Memory Design (Memory Design) roles from 30 employers tracked in the SemiconductorJobs index, counted 30 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.