Integration Design Engineer - Manila, Philippines
Originally posted 29 October 2026 by the employer.
About the role
The Integration Design Engineer will be part of the Silicon Integration Team, responsible for integrating various IPs to build full chips using both custom and digital design flows.
What you'll do
- Integrate various IPs to build the full chip, delivering all corresponding models, views, collaterals, and completing checks and simulations for sign-off.
- Collaborate with Architecture, SW, IP Design, and Physical Design teams to generate full-chip logical floorplans, behavioral models, synthesized netlists, and full-chip schematics.
- Design and implement custom and digital density-specific IPs such as clock networks and sectors suitable for full-chip integration.
- Execute integration checks and flows, including elaboration/compilation, synthesis, equivalence checking, DFT, timing closure (SPICE simulation and/or STA), and power/performance analysis.
- Perform tapeout-gating audits including EMIR analysis, NetERC, PDN extraction, SSO simulations, and ESD checks.
- Work closely with cross-functional teams to debug and resolve chip integration issues.
What you'll need
- BS or MS in Electronics, Computer, or Electrical Engineering.
- At least 5 years of experience in custom and digital design implementation.
- Expertise in Verilog and SystemVerilog.
- Strong understanding of custom design flow, semiconductor principles, transistor-level analysis, schematic/layout entry (Cadence Virtuoso), and SPICE characterization.
- Solid understanding of digital design flow, including RTL coding, Lint, synthesis, equivalence check, SDC, and STA using tools such as Xcelium, Genus, Innovus, and Tempus.
- Experience in scripting with Perl, TCL, Shell, Skill, or Python.
Nice to have
- Experience in FPGA/CPLD design and integration.
- Knowledge in DFT flow and ATPG generation.
- Experience in IP and full-chip functional verification.
Skills: IP Integration, Verilog, SystemVerilog, Synthesis, STA, Floorplan
More semiconductor jobs: RTL design jobs · Philippines jobs
This role has been open 0 days — well below the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1077
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Lattice Semiconductor | All employers we track in this specialty (1077 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 1077 |
| Open roles in the wider Digital Design & Verification family | 26 | 3364 · 116 employers |
| Median days open | 52 d | 63 d (−11 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: IP Integration, Verilog, SystemVerilog, Synthesis, STA, Floorplan
Who's hiring in this category
- Qualcomm · 153 open roles · median 65 d
- Synopsys · 86 open roles · median 42 d
- AMD · 80 open roles · median 43 d
- Analog Devices · 47 open roles · median 58 d
- NXP Semiconductors · 44 open roles · median 97 d
- NVIDIA · 37 open roles · median 48 d
How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.