IC Packaging Engineer - Taipei, Taiwan
Originally posted 22 September 2026 by the employer.
About the role
This role involves developing and deploying new IC packaging technologies by interfacing between internal product/device design, quality, supply chain, and external suppliers.
What you'll do
- Develop and deploy new IC packaging technologies.
- Interface between internal product/device design, quality, and supply chain teams.
- Interface with external suppliers for technology development.
- Bring packaging solutions from concept to high-volume manufacturing.
- Drive issue resolution with a good understanding of root cause and physics.
What you'll need
- M.S or Ph.D. degree in mechanical engineering, physics, materials science or similar disciplines.
- Minimum of 5 years of experience in IC packaging.
- In-depth knowledge in wafer bumping, PM/RDL fan-in & fan-out & system-in-package integration.
- Good understanding of module process such as Cu RDL, polymer passivation, advanced node wafer singulation and die level process.
Nice to have
- Good understanding of Chip on Wafer hybrid or fusion bonding technologies.
- Knowledge in wafer level CSP, fcCSP, SiP and their corresponding applications in power management, baseband and RF.
- Good understanding of advanced silicon node BEOL and device physics or component/board level reliability testing.
- Ability to perform independent research and development work with minimal supervision.
Skills: IC packaging, wafer bumping, RDL fan-in & fan-out, system-in-package, hybrid bonding, wafer level CSP
This role has been open 0 days — well below the 56-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
297
|
Median days open
56 d
|
Median salary
$172k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (297 roles · 57 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 297 |
| Open roles in the wider Process, Fab & Equipment family | 3 | 9479 · 109 employers |
| Median days open | 15 d | 56 d (−41 d vs this employer) |
| Median salary (USD postings) | — | $172k |
Skills observed across this category: IC packaging, wafer bumping, RDL fan-in & fan-out, system-in-package, hybrid bonding, wafer level CSP
Who's hiring in this category
- KLA Corporation · 50 open roles · median 104 d
- Micron Technology · 36 open roles · median 34 d
- Infineon Technologies · 19 open roles · median 43 d
- Renesas Electronics · 19 open roles · median 23 d
- onsemi · 15 open roles · median 14 d
- Lumilens · 13 open roles · median 47 d
How we counted: 297 open Packaging Engineering (Advanced Packaging) roles from 57 employers tracked in the SemiconductorJobs index, counted 23 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.