$60,320 - $101,920 USD hourly
About the role
Skyworks is seeking an IC Layout Engineering Intern to join the High Performance Analog business group. The role focuses on the physical implementation and verification of RF, analog, and mixed-signal circuit blocks across GaAs, Silicon, and GaN semiconductor technologies.
What you'll do
- Complete physical implementation of RF, analog, and mixed-signal circuit blocks using Cadence Virtuoso and industry-standard EDA tools.
- Learn and apply foundry PDK design rules and layout methodologies, including block-level floorplanning and device placement.
- Execute and debug physical verification checks including DRC, LVS, and ERC.
- Support tapeout activities, including the generation of GDS files and documentation packages.
- Apply layout techniques such as matching, symmetry, shielding, guard rings, and routing across GaAs, Silicon, and GaN technologies.
- Maintain version control practices and document layout activities, verification results, and project milestones.
What you'll need
- Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Physics, or a related technical discipline with a minimum GPA of 3.0.
- Coursework in analog circuits, digital circuits, VLSI design, semiconductor devices, or microelectronics.
- Coursework or project experience involving IC physical design or VLSI layout.
- Familiarity with Cadence Virtuoso or similar IC design tools.
- Understanding of layout verification concepts such as DRC and LVS.
- Basic knowledge of Linux operating systems and exposure to scripting languages such as Python, SKILL, Perl, or Shell scripting.
Skills: Cadence Virtuoso, DRC, LVS, GDS, PDK
More semiconductor jobs: Analog design jobs
This role has been open 10 days — well below the 26-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
88
|
Median days open
26 d
|
Category median salary (all employers)
$162k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Skyworks | All employers we track in this specialty (88 roles · 30 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 88 |
| Open roles in the wider Analog & Mixed-Signal family | 109 | 1541 · 115 employers |
| Median days open | 12 d | 26 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Skills observed across this category: Cadence Virtuoso, DRC, LVS, GDS, PDK
Who's hiring in this category
- Analog Devices · 10 open roles · median 43 d
- NVIDIA · 7 open roles · median 5 d
- onsemi · 7 open roles · median 34 d
- Renesas Electronics · 7 open roles · median 25 d
- Infineon Technologies · 6 open roles · median 22 d
- Marvell Technology · 6 open roles · median 42 d
How we counted: 88 open Analog IC Design (Analog Layout) roles from 30 employers tracked in the SemiconductorJobs index, counted 8 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.