IC Layout Engineering Intern - Richardson, TX, United States
$31 - $42 USD yearly
Originally posted 31 August 2026 by the employer.
About the role
This IC Layout Engineering Intern position at QORVO involves the physical implementation of RF, analog, and mixed-signal circuit blocks.
What you'll do
- Complete physical implementation of RF, analog, and mixed-signal circuit blocks.
- Apply foundry PDK design rules and layout methodologies.
- Perform layout edits using Cadence Virtuoso and other industry standard EDA tools.
- Execute basic verification checks including DRC, LVS, and ERC.
- Participate in debugging and resolving verification issues.
- Assist in maintaining clean and organized version control practices.
- Document layout activities, verification results, and project milestones.
- Generate GDS files and documentation packages for tapeout activities.
- Learn about semiconductor technologies (GaAs, Silicon, and GaN) and best practices such as matching, symmetry, shielding, guard rings, and routing techniques.
What you'll need
- Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Physics, or a related technical discipline.
- Minimum GPA of 3.0 or equivalent academic standing.
- Basic understanding of semiconductor devices and integrated circuits.
- Coursework in analog circuits, digital circuits, VLSI design, semiconductor devices, or microelectronics.
- Coursework or projects involving IC physical design or VLSI layout.
- Familiarity with Cadence Virtuoso or similar IC design tools.
- Basic knowledge of Linux operating systems.
- Exposure to scripting languages such as Python, SKILL, Perl, or Shell scripting.
- Understanding of layout verification concepts such as DRC and LVS.
Skills: physical implementation, RF, analog, mixed signal, Cadence Virtuoso, DRC, LVS, ERC, GDS files
This role has been open 28 days — slightly above the 25-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
46
|
Median days open
25 d
|
Median salary
—
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (46 roles · 21 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 46 |
| Open roles in the wider Analog & Mixed-Signal family | 70 | 1393 · 107 employers |
| Median days open | 32 d | 25 d (+7 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: physical implementation, RF, analog, mixed signal, Cadence Virtuoso, DRC, LVS, ERC, GDS files
Who's hiring in this category
- Celero · 8 open roles · median 31 d
- Analog Devices · 6 open roles · median 11 d
- Broadcom · 3 open roles · median 7 d
- Marvell Technology · 3 open roles · median 24 d
- onsemi · 3 open roles · median 34 d
- QORVO (this employer) · 3 open roles · median 32 d
How we counted: 46 open Analog IC Design (Analog Layout) roles from 21 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.