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AMD

IC Design Exploration Intern - SG, Singapore-Design Ctr, Singapore

AMD SG, Singapore-Design Ctr, Singapore Internship 9 months ago
Analog & Mixed-Signal Design

Originally posted 29 December 2025 by the employer — open 255 days.

This role is part of the SerDes Technology team.

About the role

This IC Design Exploration Intern role offers the opportunity to gain real-world experience in various aspects of IC design, including analog design, digital design, functional verification, and post-silicon validation. You will contribute to the SerDes Technology team, focusing on high-speed analog and mixed-signal circuits in advanced technology nodes (3nm, 7nm).

What you'll do

  • Strengthen foundational technical IC design knowledge.
  • Work independently and collaboratively across multiple geographical sites.
  • Participate in technical discussions and conduct knowledge sharing sessions.
  • Design and develop high speed analog and mixed signal circuits (112Gbps and above).
  • Use, simulate, and analyze logs and reports generated from EDA tools.
  • Develop validation methodology and automation scripting to characterize SerDes designs.

What you'll need

  • Degree/Master/PhD in Electronics/Electrical/Computer Engineering/Computer Science.
  • Willingness to learn.
  • Scripting skills (Perl, TCL, shell, Python).
  • Problem-solving skills.
  • Ability to work collaboratively in a team-oriented environment.

Nice to have

  • Good fundamental of digital logic design.
  • Experience in Verilog and/or VHDL.
  • Good programming/scripting skills (Python, OOP concepts, Perl, etc).
  • Experience in SystemVerilog and/or UVM.
  • Experience in AI/ML related project.
  • Strong programming/scripting skills (Python, C/C++, Perl, TCL).
  • Knowledge of common lab equipment (BERT, analyzers, oscilloscopes, PNA/VNA).

Skills: SerDes Technology, high speed analog, mixed signal circuit, Verilog (RTL), post-silicon validation

Market context

This role has been open 171 days — well above the 91-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
217
Median days open
91 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How AMD compares in High-Speed IO/SerDes Design hiring
Metric AMD All employers we track in this specialty (217 roles · 44 employers)
Open roles in category 24 217
Median days open 61 d 91 d (−30 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: SerDes Technology, high speed analog, mixed signal circuit, Verilog (RTL), post-silicon validation

Who's hiring in this category

  • AMD (this employer) · 24 open roles · median 61 d
  • Cadence Design Systems · 19 open roles · median 153 d
  • Qualcomm · 17 open roles · median 74 d
  • Synopsys · 16 open roles · median 53 d
  • Broadcom · 11 open roles · median 142 d
  • NVIDIA · 10 open roles · median 95 d

How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Apply now
SG, Singapore-Design Ctr, Singapore
On-site
Internship
9 months ago

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