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Renesas Electronics

HPC High-Speed I/F Engineering Manager - Kodaira, Japan

Renesas Electronics Kodaira, Japan Full-time 2 months ago
Analog & Mixed-Signal Design

Originally posted 18 August 2026 by the employer — open 23 days.

About the role

This role involves leading the design and development of high-speed interface subsystems for automotive SoCs, specifically the R-Car series.

What you'll do

  • Lead the organization and technical decisions for the overall design and development of high-speed interface subsystems in automotive SoCs (R-Car series) as a section manager.
  • Formulate specification and architecture policies for high-speed interface subsystems, including PCIe, UCIe, USB, and UFS, and ensure quality through design reviews and technical judgments.
  • Prioritize subsystems and make final decisions considering constraints in performance, power consumption, quality, schedule, and resources.
  • Promote SoC optimization by collaborating with SoC architects, other subsystem managers, and project management across departments.
  • Lead problem-solving as the responsible person for critical technical and organizational issues arising during the design and verification phases.
  • Manage technical negotiations, specification adjustments, and issue resolution with IP vendors regarding introduced IP.
  • Manage global development teams across design centers in Japan, India, and Vietnam, promoting role design, talent development, and organizational strengthening.

What you'll need

  • Technical leadership experience at the subsystem or IP level (e.g., leading design reviews, making technical judgments, formulating design policies).
  • Experience coordinating technology and development by collaborating with multiple engineers and related teams.
  • Ability to conduct technical discussions and adjustments in English, or work with global teams without resistance.
  • Business-level Japanese proficiency.

Skills: 高速インタフェースサブシステム, PCIe, UCIe, USB, UFS, 車載SoC, アーキテクチャ方針

Market context

This role has been open 22 days — well below the 91-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
217
Median days open
91 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Renesas Electronics compares in High-Speed IO/SerDes Design hiring
Metric Renesas Electronics All employers we track in this specialty (217 roles · 44 employers)
Open roles in category 8 217
Median days open 160 d 91 d (+69 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: 高速インタフェースサブシステム, PCIe, UCIe, USB, UFS, 車載SoC

Who's hiring in this category

  • AMD · 24 open roles · median 61 d
  • Cadence Design Systems · 19 open roles · median 153 d
  • Qualcomm · 17 open roles · median 74 d
  • Synopsys · 16 open roles · median 53 d
  • Broadcom · 11 open roles · median 142 d
  • NVIDIA · 10 open roles · median 95 d

How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Apply now
Kodaira, Japan
On-site
Full-time
2 months ago

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