High Speed IO (HSIO) Validation Engineer - CA, Santa Clara, United States
Originally posted 15 September 2026 by the employer.
About the role
The High-Speed IO (HSIO) Validation Engineer is responsible for validating and debugging high-speed interfaces across CPU and GPU platforms spanning data center servers and AI systems. The position focuses on executing validation plans, characterizing interface performance, and driving root-cause analysis for PCIe Gen5/Gen6/Gen7, UALink, xGMI, and Ethernet interfaces.
What you'll do
- Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other emerging technologies. - Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation across multiple platforms. - Collaborate with PHY design, SI/PI, firmware, board, and platform teams to investigate and resolve interface issues. - Develop and enhance test automation, validation scripts, and data analysis tools using Python, C/C++, or similar languages. - Perform electrical- and protocol-level debug using oscilloscopes, BERTs, VNAs, and protocol analyzers. - Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field with 5+ years of experience in high-speed IO, silicon validation, or system validation. - Direct experience validating high-speed serial interfaces such as PCIe, CXL, Ethernet, or UALink. - Technical understanding of signal integrity concepts, channel characteristics, equalization techniques (CTLE, DFE, TX FIR), and link-level behavior. - Hands-on experience with lab bring-up, validation, and debug using high-speed measurement equipment such as oscilloscopes, BERTs, VNAs, and protocol analyzers. - Programming and scripting skills in Python, C/C++, or similar languages for automation and data analysis. - Experience with silicon bring-up, compliance testing, and system-level debug methodologies.
Nice to have
- Experience validating server, AI, networking, or accelerator platforms. - Experience with PCIe, Ethernet, UALink, or other high-speed interface compliance and interoperability testing. - Experience developing automated validation frameworks and data analysis workflows. - Contributions to technical publications, patents, industry standards, or internal best-known methods (BKMs).
Skills: high-speed IO, PCIe Gen5/Gen6/Gen7, post-silicon bring-up, oscilloscopes, BERT