High Speed IO Design Engineer - Seoul, South Korea
Originally posted 25 August 2026 by the employer.
About the role
This role involves the design of High-Speed PHY and architectures, with a focus on clock recovery schemes.
What you'll do
- Design High-Speed PHY and datapath architectures with clock recovery schemes.
- Perform timing budgeting and analysis for custom high-speed designs.
- Conduct SI/PI analysis using models like IBIS/SPF.
- Utilize tools such as Cadence Virtuoso, Synopsys custom compiler, Hspice, Spectre, and Finesim.
What you'll need
- 5+ years of experience in protocols including NAND (FLASH) Toggle mode/Onfi, DDR3/4/5, LPDDR3/4/5, GDDR3/4/5/6, and HBM2/3/3E.
- Thorough understanding of High-Speed PHY and clock recovery schemes.
- In-depth knowledge of timing budgeting and analysis in custom high-speed designs.
- Working knowledge of SI/PI analysis with various models like IBIS/SPF.
- Experience with statistical simulation methodologies.
Skills: High-Speed PHY, clock recovery, Timing budgeting, SI/PI Analysis, DDR3/4/5, LPDDR3/4/5, HBM2/3/3E
This role has been open 35 days — well below the 76-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
239
|
Median days open
76 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SanDisk | All employers we track in this specialty (239 roles · 49 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 239 |
| Open roles in the wider Analog & Mixed-Signal family | 6 | 1385 · 107 employers |
| Median days open | 28 d | 76 d (−48 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: High-Speed PHY, clock recovery, Timing budgeting, SI/PI Analysis, DDR3/4/5, LPDDR3/4/5
Who's hiring in this category
- AMD · 28 open roles · median 64 d
- Synopsys · 26 open roles · median 44 d
- Qualcomm · 20 open roles · median 58 d
- Cadence Design Systems · 18 open roles · median 181 d
- Apple · 12 open roles · median 7 d
- NVIDIA · 11 open roles · median 116 d
How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.