High-Speed I/F Engineering Manager - Kodaira, Japan
Analog & Mixed-Signal Design
Originally posted 30 March 2026 by the employer — open 164 days. Relisted by the employer on 18 August 2026.
About the role
This role is for an Engineering Manager responsible for leading High-Speed I/F subsystem design and development for automotive SoCs in the R-Car series.
What you'll do
- Serve as an Engineering Manager accountable for technical decision-making and organizational leadership for High-Speed I/F subsystem design.
- Define and drive specification and architectural direction of High-Speed I/F subsystems, including PCIe, UCIe, USB, and UFS-related areas.
- Make prioritization decisions and final judgments at the subsystem level, balancing performance, power, quality, schedule, and resource constraints.
- Take ownership of resolving critical technical and organizational issues during the design and verification phases.
- Oversee technical coordination with third-party IP vendors, including specification alignment, constraint clarification, and issue resolution.
- Manage a global development organization across Japan, India, and Vietnam, driving role definition, team development, and sustainable execution capability.
What you'll need
- Experience serving as a technical lead at subsystem or IP level, including responsibility for design reviews, technical decisions, and design direction.
- Proven ability to coordinate multiple engineers and stakeholders and drive development forward.
- Ability to work in English in technical discussions and coordination within a global development environment.
- Japanese language proficiency at a business level.
Skills: High-Speed Interface, PCIe, UCIe, USB, UFS, SoC
Market context
This role has been open 163 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 8 | 217 |
| Median days open | 160 d | 91 d (+69 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: High-Speed Interface, PCIe, UCIe, USB, UFS, SoC
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.