Analog & Mixed-Signal Design
About the role
This role involves designing high-performance analog and mixed-signal circuits, including high-speed re-drivers and switches for USB applications, clocking circuits, and precision analog circuits.
What you'll do
- Design high-performance analog and mixed-signal circuits from concept to silicon validation.
- Translate chip-level requirements (data rate, BER, jitter budget) into detailed block-level architectures and specifications.
- Develop behavioral models (Verilog-A/AMS) for analog blocks to validate architecture performance.
- Perform system-level modeling (MATLAB/Simulink) for noise and transfer functions.
- Conduct design analysis and hand calculations to predict and validate simulation results.
- Collaborate with layout engineers to ensure optimal device placement, matching, EM/IR compliance, shielding, and guard ring implementation.
What you'll need
- MS in Electrical Engineering with 3–5 years of IC development experience, or PhD with 1-2 years of experience.
- Strong expertise in high-speed analog circuit design fundamentals, including signal integrity, jitter analysis, noise, bandwidth optimization, stability, and frequency compensation techniques.
- Proven experience in one or more of the following: High-speed interfaces (e.g., SerDes, USB, Ethernet), clocking systems (PLL, CDR, frequency synthesis).
- Hands-on experience with Cadence IC design tools (Virtuoso, Spectre) and modeling tools such as MATLAB/Simulink.
- Solid understanding of device physics and parasitic effects impacting high-speed performance.
Skills: high-speed analog, SerDes, USB, Ethernet, PLL, jitter
Market context
This role has been open 79 days — well below the 89-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
215
|
Median days open
89 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | Market (215 open roles · 44 companies) |
|---|---|---|
| Open roles in category | 3 | 215 |
| Median days open | 79 d | 89 d (−10 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: high-speed analog, SerDes, USB, Ethernet, PLL, jitter
Who's hiring in this category
- AMD · 24 open roles · median 60 d
- Cadence Design Systems · 19 open roles · median 152 d
- Qualcomm · 18 open roles · median 68 d
- Synopsys · 16 open roles · median 52 d
- Broadcom · 11 open roles · median 141 d
- Micron Technology · 9 open roles · median 126 d
Based on 215 open roles at 44 companies in our index. Snapshot 9 Sept 2026.