High Speed AI Interconnect Signal Integrity Engineer - Austin, Texas, United States
$100,000 - $500,000 USD yearly
Originally posted 4 March 2026 by the employer — open 190 days. Relisted by the employer on 4 August 2026.
About the role
Tenstorrent is seeking a senior High Speed Interconnect / Signal Integrity Engineer to design and validate high-bandwidth links for large-scale AI systems. This role involves defining, modeling, and qualifying interconnect solutions across copper and optical technologies for AI inference and training clusters.
What you'll do
- Define and specify high-speed interconnect architectures between systems within large AI clusters.
- Develop requirements, validation plans, and test strategies for passive and active copper cables and optical transceivers at 100G, 400G, 800G, and 1.6T.
- Document topologies, routing assumptions, and cable requirements for internal and customer-facing clusters.
- Perform link and channel budget analysis, including loss, jitter, eye margin, and BER considerations across PVT and aging.
- Interface with key industry suppliers, track their roadmaps, and align Tenstorrent’s system designs to future interconnect capabilities.
What you'll need
- Bachelor’s or Master’s in Electrical Engineering.
- 5+ years working on high-speed communications (100G–1.6T), including signal integrity, channels, and links.
- Experience building and owning link and channel budgets and making tradeoffs between reach, loss, BER, and margin.
- Hands-on with SI tools and lab equipment such as Keysight ADS, VNAs, TDRs, BERTs, and protocol analyzers.
Nice to have
- Manufacturing/DFM/DTM experience.
Skills: high-bandwidth links, signal integrity, interconnect solutions, copper and optical technologies, AI inference, training clusters
This role has been open 180 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 4 | 217 |
| Median days open | 180 d | 91 d (+89 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: high-bandwidth links, signal integrity, interconnect solutions, copper and optical technologies, AI inference, training clusters
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.