$181,000 - $323,000 USD yearly
Originally posted 29 October 2026 by the employer.
About the role
As a SoC Design Engineer in the Heterogeneous Integration Group (HIG), you will contribute to the design, development, and integration of HBM SoC logic die. The role focuses on RTL build, IP integration, debugging, and pre/post-silicon support across architecture, verification, physical design, and firmware teams.
What you'll do
- Design and implement RTL for SoC-level blocks and subsystems used in HBM logic die.
- Integrate internal and third-party IP, including controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, and PHY-adjacent logic.
- Collaborate with SoC architects to translate architectural and micro-architectural specifications into RTL implementations.
- Participate in SoC-level integration activities, including clocking, reset, power intent, and configuration infrastructure.
- Assist with pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.
- Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing.
What you'll need
- Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or a related field, with a minimum of 10 years of experience in a related field.
- Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
- Experience with the RTL-to-GDS flow, including synthesis, static timing analysis, and sign-off considerations.
- Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
- Programming or scripting experience with Python, TCL, Perl, or shell scripting.
Nice to have
- Experience with HBM, DRAM, or memory-centric SoC designs.
- Familiarity with high-speed interfaces, clocking strategies, reset architectures, and power management concepts.
- Exposure to DFT concepts, including scan, MBIST, BIRA/BISR, and debug.
- Experience with hardware emulation or acceleration platforms such as Palladium, Veloce, or Zebu.
More semiconductor jobs: Micron Technology jobs · RTL design jobs · Richardson jobs
This role has been open 0 days — well below the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1077
|
Median days open
63 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (1077 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 29 | 1077 |
| Open roles in the wider Digital Design & Verification family | 113 | 3314 · 115 employers |
| Median days open | 41 d | 63 d (−22 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 153 open roles · median 65 d
- Synopsys · 86 open roles · median 42 d
- AMD · 80 open roles · median 43 d
- Analog Devices · 47 open roles · median 58 d
- NXP Semiconductors · 44 open roles · median 97 d
- NVIDIA · 37 open roles · median 48 d
How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.