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NVIDIA

Hardware Design Validation Engineer

NVIDIA Santa Clara, CA, United States Full-time 2 days ago
Verification, Validation & Test

$108,000 - $212,750 USD yearly

Originally posted November 13, 2026 by the employer.

About the role

As a Hardware Design Validation Engineer on the System Product Team (SPT), you will take ownership of hardware validation for modules, board sections, or small products from first power-on through mass production. You will bring up new systems in the lab, validate power and high-speed interfaces, and drive issues across board, firmware, and system layers to root cause.

What you'll do

  • Own hardware validation for modules, board sections, or products, supporting test plan development and execution in areas including power, high-speed IO, low-speed IO (I2C, SPI, UART, SMBus, GPIO), clocks/resets, BMC, sensors, and telemetry.
  • Debug and root-cause board, firmware, and system issues from bring-up through production using measurements and first-principles analysis.
  • Execute power validation covering sequencing, load, transient, and protection testing.
  • Validate high-speed interfaces including PCIe, Ethernet, and USB using high-bandwidth oscilloscopes, TDR, and protocol analyzers.
  • Run system stress testing across thermal, power, IO, memory, and voltage/frequency corners to expose marginal failures.
  • Review schematics, PCB layouts, BOMs, and datasheets, and support NPI builds and debug at local and overseas manufacturing sites.

What you'll need

  • BS or MS in EE/CE or equivalent experience, plus 2+ years of hands-on board or system hardware validation, bring-up, or debug (internships and co-ops count).
  • EE fundamentals in circuit analysis, digital design, transmission lines, and power supplies.
  • Hands-on validation experience in power validation (regulators, sequencing, PDN, telemetry), high-speed IO (PCIe, Ethernet, USB, display, or DDR), low-speed IO (I2C, SPI, UART, SMBus, GPIO), or system functional and stress testing.
  • Lab test bench experience using oscilloscopes, power supplies, electronic loads, DMMs, TDR, and logic/protocol analyzers.
  • Working knowledge of schematics, PCB layout, and BOMs, with failure analysis skills across board, firmware, and software.
  • Scripting or programming experience in Python or C/C++ within Linux and Windows environments.
  • Ability to work on site in the Santa Clara lab five days a week, with willingness to travel up to 5% to local manufacturing sites.

Nice to have

  • Validation or bring-up experience on GPU, server, automotive, or embedded platforms.
  • Multi-phase VR design validation, PDN characterization, or high-speed IO electrical validation (eye diagram, compliance test, BERT, PCIe link training, or DDR).
  • Experience creating or automating system stress workloads, functional test suites, or lab infrastructure, plus BMC/manageability or firmware debug.
  • Factory build or NPI support experience, or exposure to Android or automotive OS.
  • Willingness to travel internationally up to 8% to Asia manufacturing sites during peak NPI phases.

Skills: lab bring-up, oscilloscope, power validation, PCIe, debug

More semiconductor jobs: NVIDIA jobs · Silicon validation jobs · California jobs

Market context

First seen in our index 0 days ago, well below the 42-day median for Post-Silicon Validation roles.

Post-Silicon Validation · Silicon Validation

Open roles in category
484
Median days since first seen
42 d
Category median salary (all employers)
$168k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NVIDIA compares in Post-Silicon Validation hiring
Metric NVIDIA All employers we track in this specialty (484 roles · 70 employers)
Open roles in this specialty 28 484
Open roles in the wider Silicon Validation & Test family 113 2559 · 134 employers
Median days since first seen 44 d 42 d (−2 d vs this employer)
Median salary (USD postings) n/a $168k

Skills observed across this category: lab bring-up, oscilloscope, power validation, PCIe, debug

Who's hiring in this category

  • AMD · 66 open roles · median 40 d
  • Qualcomm · 53 open roles · median 42 d
  • Apple · 29 open roles · median 22 d
  • Micron Technology · 29 open roles · median 50 d
  • NVIDIA (this employer) · 27 open roles · median 44 d
  • Microchip Technology · 21 open roles · median 91 d

How we counted: 484 open Post-Silicon Validation (Silicon Validation) roles from 70 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Silicon Validation & Test family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.

Apply now
Santa Clara, CA, United States
On-site
Full-time
$108,000 - $212,750 USD yearly
2 days ago

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