Graduate – Analog Design Engineer - Morrisville, NC, United States
$89,600 - $112,000 USD yearly
Originally posted 7 September 2026 by the employer.
About the role
This role is for a Graduate Analog Design Engineer focusing on the design and verification of analog/mixed-signal blocks at the transistor level.
What you'll do
- Design and refine analog/mixed-signal blocks including op-amps, comparators, bandgaps, LDOs, charge pumps, bias generators, and ADC/DAC subcircuits.
- Design and verify DC-DC control loops for compensation, transient response, EMI/EMC, efficiency optimization, startup/soft start, and protection features.
- Execute SPICE simulations covering DC/AC/transient analysis, stability, PSRR/CMRR, PVT corners, Monte Carlo mismatch/yield studies, and parasitic-aware post-layout verification.
- Partner with layout engineers on device matching, common centroid techniques, guard rings, isolation, shielding, routing strategy, and physical verification (DRC, LVS, PEX).
- Integrate analog blocks into chip-level designs with attention to biasing, I/O pad ring ESD, power domains, and startup/reset sequencing.
- Support ATE/test engineering with characterization vectors and limit setting while contributing to yield ramp investigations and post-silicon correlation.
What you'll need
- MS or PhD in Electrical Engineering.
- Hands-on experience with transistor-level analog/mixed-signal circuit design including LDOs, switching regulators, bandgap references, op-amps, or gate drivers.
- Proficiency in SPICE-based simulation tools (Cadence Spectre, HSPICE, or equivalent) with exposure to behavioral modeling using Verilog-A or MATLAB.
- Familiarity with CMOS and/or BCD process technologies including high-voltage device handling, ESD/latch-up constraints, and reliability considerations (BTI, HCI, EM).
- Basic understanding of analog layout techniques including device matching, parasitic extraction (PEX), and physical verification flows (DRC, LVS).
Skills: analog/mixed-signal blocks, op-amps, comparators, bandgaps, LDOs, charge pumps, ADC/DAC, DC-DC control loops, SPICE simulations, transistor-level
This role has been open 22 days — well below the 63-day median for Analog IC Design roles.
Analog IC Design · Power Management
|
Open roles in category
91
|
Median days open
63 d
|
Median salary
$170k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Infineon Technologies | All employers we track in this specialty (91 roles · 15 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 91 |
| Open roles in the wider Analog & Mixed-Signal family | 67 | 1385 · 107 employers |
| Median days open | 89 d | 63 d (+26 d vs this employer) |
| Median salary (USD postings) | — | $170k |
Skills observed across this category: analog/mixed-signal blocks, op-amps, comparators, bandgaps, LDOs, charge pumps
Who's hiring in this category
- onsemi · 22 open roles · median 40 d
- Renesas Electronics · 20 open roles · median 64 d
- Monolithic Power Systems · 9 open roles · median 193 d
- Infineon Technologies (this employer) · 7 open roles · median 88 d
- QORVO · 7 open roles · median 29 d
- Texas Instruments · 7 open roles · median 53 d
How we counted: 91 open Analog IC Design (Power Management) roles from 15 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.