About the role
This role involves initiating the internal assembly design, BOM, and process flow for GaN devices in a target package footprint.
What you'll do
- Initiate the internal assembly design of GaN devices, BOM, and process flow.
- Conduct risk assessments and identify mitigating actions in collaboration with OSAT and Navitas teams.
- Drive all assembly validation activities to freeze Design-, BOM-, and Process-of-records.
- Perform Learning Cycle builds to validate design and material selection versus target performance.
- Oversee the assembly of Final POR Qualification Lots at OSAT and deliver samples for Reliability testing.
- Generate Application Notes for new packages to guide optimum board mount conditions for Navitas products.
What you'll need
- Bachelor's or MS degree in Semiconductor Engineering, Materials Science, Chemical Engineering, or a related technical field.
- At least 15 years experience in Package design and development.
- Strong understanding of power semiconductor device physics and manufacturing processes.
- Deep working knowledge of SPC, DOE, Cpk/Ppk analysis, FMEA, control plans, root-cause analysis, and yield analytics.
- Proven experience leading engineering projects and mentoring technical teams.
- Excellent communication skills with the ability to collaborate effectively across global, cross-functional organizations.
Nice to have
- Experience with SiC and/or GaN technologies.
- Package design using 2D CAD.
- Understanding of FEA simulation techniques, reliability qualification standards, failure-analysis methodologies, and process excursion management.
- Experience in new assembly technologies for advanced power devices (flipchip, clip attach, Ag sinter).
- Experience in leading or coordinating geographically distributed engineering teams.
Skills: GaN, package design, assembly validation, BOM, process flow
This role has been open 33 days — well below the 65-day median for Packaging Engineering roles.
Packaging Engineering · Packaging
|
Open roles in category
201
|
Median days open
65 d
|
Median salary
$162k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Navitas Semiconductor | All employers we track in this specialty (201 roles · 42 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 201 |
| Open roles in the wider Process, Fab & Equipment family | 8 | 9348 · 109 employers |
| Median days open | 33 d | 65 d (−32 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Skills observed across this category: GaN, package design, assembly validation, BOM, process flow
Who's hiring in this category
- Infineon Technologies · 29 open roles · median 27 d
- Micron Technology · 21 open roles · median 138 d
- Renesas Electronics · 19 open roles · median 20 d
- Intel Corporation · 12 open roles · median 144 d
- Monolithic Power Systems · 12 open roles · median 180 d
- onsemi · 7 open roles · median 60 d
How we counted: 201 open Packaging Engineering (Packaging) roles from 42 employers tracked in the SemiconductorJobs index, counted 16 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.