Originally posted 17 September 2026 by the employer — open 1 day.
About the role
This internship involves working as a Physical Mixed Layout Engineer Intern, collaborating with an experienced design team on the layout of complex integrated circuits. You will contribute to the successful implementation of semiconductor solutions.
What you'll do
- Collaborate with senior engineers to create and optimize physical mixed-signal layouts for integrated circuits.
- Assist in floorplanning, placement, and routing of analog and digital blocks.
- Utilize industry-standard EDA tools for layout design and verification.
- Participate in design reviews and provide input on layout-related decisions.
- Work closely with cross-functional teams to ensure layout meets performance, power, and area requirements.
- Troubleshoot and resolve layout-related issues as they arise.
What you'll need
- Basic understanding of semiconductor fundamentals and integrated circuit design principles.
- In study towards a bachelor’s degree in Electrical Engineering, Computer Engineering, Engineering Science, Computer Science, or related field.
- Available May/June 2027 - August/September 2028 for a 16-month internship.
- Expected graduation date of November 2028 or later.
- 1 year of academic experience with programming languages such as C, C++, Python.
- Excellent problem-solving skills and attention to detail.
Nice to have
- Familiarity with layout design tools such as Cadence Virtuoso, Synopsys IC Compiler.
- Proficiency in scripting languages like Python or TCL.
- PCB and FPGA experience.
- Coursework in CMOS.
Skills: physical mixed-signal layouts, floorplanning, placement, routing, EDA tools
This role has been open 0 days — well below the 57-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
601
|
Median days open
57 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (601 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 112 | 601 |
| Open roles in the wider Physical Implementation family | 154 | 1379 · 105 employers |
| Median days open | 40 d | 57 d (−17 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: physical mixed-signal layouts, floorplanning, placement, routing, EDA tools
Who's hiring in this category
- Qualcomm (this employer) · 103 open roles · median 42 d
- Broadcom · 38 open roles · median 67 d
- NVIDIA · 38 open roles · median 48 d
- AMD · 34 open roles · median 41 d
- Synopsys · 28 open roles · median 57 d
- Renesas Electronics · 25 open roles · median 44 d
How we counted: 601 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.