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AMD

Fall 2027 Masters Silicon Design Engineering Intern - TX, Austin, United States

AMD US, TX, Austin, United States Internship 1 month ago
Analog & Mixed-Signal Design

Originally posted 2 September 2026 by the employer.

About the role

This role is for a Silicon Design Engineering Intern to support new product bring-up, debug issues, and improve automation and testing capabilities.

What you'll do

  • Support new product bring-up
  • Assist in debug of issues
  • Develop or contribute to diagnostic framework including FW for IP training, margining, and debug
  • Improve automation and testing capabilities

What you'll need

  • Currently enrolled in a United States based University in a Graduate program majoring in Electrical/Computer Engineering
  • Solid understanding of High-speed I/O design experience, including understanding of Tx, Rx, PLL/DLL, Clocking, Equalization techniques and circuits, Training algorithms and Firmware
  • Python and/or Perl programming
  • Familiarity with Unix/Linux OS as well as Windows
  • Laboratory experience, including hands-on use of equipment: Oscilloscopes, Signal generators, BERT, Logic analyzers

Skills: High-speed I/O, Tx, Rx, PLL, Equalization techniques

Market context

This role has been open 27 days — well below the 76-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
239
Median days open
76 d
Median salary
$177k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How AMD compares in High-Speed IO/SerDes Design hiring
Metric AMD All employers we track in this specialty (239 roles · 49 employers)
Open roles in this specialty 28 239
Open roles in the wider Analog & Mixed-Signal family 37 1385 · 107 employers
Median days open 64 d 76 d (−12 d vs this employer)
Median salary (USD postings) — $177k

Skills observed across this category: High-speed I/O, Tx, Rx, PLL, Equalization techniques

Who's hiring in this category

  • AMD (this employer) · 28 open roles · median 64 d
  • Synopsys · 26 open roles · median 44 d
  • Qualcomm · 20 open roles · median 58 d
  • Cadence Design Systems · 18 open roles · median 181 d
  • Apple · 12 open roles · median 7 d
  • NVIDIA · 11 open roles · median 116 d

How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Apply now
US, TX, Austin, United States
On-site
Internship
1 month ago

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