Originally posted 19 May 2026 by the employer.
About the role
Microchip's Corporate CAD group is seeking a Grid Engineer to help design, develop, and support grid infrastructure and workflows. In this role, you will support critical Electronic Design Automation (EDA) workloads across clustered compute systems.
What you'll do
- Evaluate the effectiveness and efficiency of existing clustered compute systems and develop strategies to enhance performance, scalability, and utilization. - Serve as a primary technical contact for end users, providing guidance on running simulations and promoting best practices. - Design, write, and maintain software to drive, tune, and monitor EDA workloads within the compute grid. - Create and maintain documentation related to compute grid infrastructure and EDA workflows. - Research emerging software and systems technologies to support recommendations and purchasing decisions. - Collaborate with cross-functional engineering teams to ensure secure, stable, and optimized grid operations.
What you'll need
- Minimum of 2.5 years of experience in an Electrical Engineering, Computer Science, or High-Performance Computing role. - Hands-on experience with job schedulers such as LSF, SGE, RTDA, or SLURM. - Strong proficiency with Unix/Linux operating systems and file systems. - Fundamental programming and scripting skills using csh, Bash, Perl, Python, Tcl, and/or C/C++. - Experience with Electronic Design Automation (EDA) tools and suites from Cadence, Synopsys, and Siemens.
Nice to have
- DevOps or GIT/Jenkins workflow experience. - Familiarity with Machine Learning and Artificial Intelligence frameworks such as LLM or TensorFlow.
Skills: grid infrastructure, EDA workloads, job schedulers, Synopsys, Cadence
This role has been open 124 days — well above the 68-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
701
|
Median days open
68 d
|
Median salary
$189k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Microchip Technology | All employers we track in this specialty (701 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 12 | 701 |
| Open roles in the wider Physical Implementation family | 28 | 1489 · 109 employers |
| Median days open | 48 d | 68 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $189k |
Skills observed across this category: grid infrastructure, EDA workloads, job schedulers, Synopsys, Cadence
Who's hiring in this category
- Cadence Design Systems · 154 open roles · median 151 d
- Synopsys · 62 open roles · median 42 d
- Micron Technology · 44 open roles · median 51 d
- GlobalFoundries · 39 open roles · median 25 d
- Qualcomm · 38 open roles · median 75 d
- Keysight Technologies · 34 open roles · median 78 d
How we counted: 701 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.