EMIB-T Substrate Yield Lead - Arizona, Phoenix, United States
Packaging & Advanced Integration
$180,770 - $255,200 USD yearly
Originally posted 17 August 2026 by the employer.
Lead yield performance for EMIB-T (Embedded Multi-die Interconnect Bridge with TSV) technology.
About the role
What you'll do
- Own end-to-end substrate yield performance for EMIB-T technology development and manufacturing readiness.
- Drive DFM/DFY engagement, defect pareto closure, process optimization, and yield improvement plans.
- Lead daily yield huddles and cross-functional reviews to ensure program execution and address yield risks.
- Proactively identify, prioritize, and drive closure of critical yield, reliability, process, and supplier-related issues.
- Partner with substrate suppliers, module engineers, integration, manufacturing, design, Q&R, and platform integration teams.
- Define and scale the yield intelligence infrastructure for EMIB-T, including dashboards, automated analytics, computer vision, AI/ML defect detection, and automated defect classification.
What you'll need
- Master's degree with 6+ years or PhD with 4+ years in Engineering, Materials Science, Physics, Chemistry, Data Science, or a related technical discipline.
- 5+ years of experience in semiconductor manufacturing, advanced packaging, substrate technology, yield engineering, or process engineering.
- Hands-on experience in substrate, advanced packaging, or semiconductor yield engineering, including statistical analysis, defect reduction, process optimization, SPC, DFM/DFY, defect metrology, failure analysis, and HVM execution.
- Strong analytical and problem-solving skills.
- Experience working across multiple organizations and influencing stakeholders.
- Experience developing or deploying yield monitoring systems, automated analytics, dashboards, image analytics, computer vision, AI/ML-based defect detection, or automated defect classification systems.
Nice to have
- Experience working directly with substrate suppliers and external manufacturing partners.
- Demonstrated program leadership experience, including coordinating cross-functional technical teams.
- Experience with advanced packaging technologies, including EMIB, EMIB-T, TSV, 2.5D/3D integration, substrates, or heterogeneous integration.
- Prior experience supporting technology development, qualification, and manufacturing ramp of advanced semiconductor technologies.
Market context
This role has been open 60 days — below the 61-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
299
|
Median days open
61 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (299 roles · 59 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 299 |
| Open roles in the wider Process, Fab & Equipment family | 186 | 9915 · 109 employers |
| Median days open | 41 d | 61 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Who's hiring in this category
- KLA Corporation · 43 open roles · median 128 d
- Micron Technology · 38 open roles · median 37 d
- Renesas Electronics · 17 open roles · median 47 d
- Intel Corporation (this employer) · 16 open roles · median 41 d
- GlobalFoundries · 14 open roles · median 60 d
- Infineon Technologies · 14 open roles · median 66 d
How we counted: 299 open Packaging Engineering (Advanced Packaging) roles from 59 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.
US, Arizona, Phoenix, United States
On-site
$180,770 - $255,200 USD yearly
2 months ago