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Ricursive Intelligence

EDA Algorithm Engineer - Palo Alto, United States

Ricursive Intelligence Palo Alto, United States Full-time 6 days ago
Physical Design & EDA

Originally posted 22 October 2026 by the employer.

About the role

Ricursive Intelligence is hiring an EDA Algorithm Engineer to develop algorithms across synthesis, physical design, and sign-off.

What you'll do

- Design algorithms spanning synthesis, physical design, and sign-off workflows. - Run large-scale experiments to evaluate and refine computational methods. - Build and ship software products that transform chip design processes. - Work hands-on alongside engineers and researchers combining AI models with chip development.

What you'll need

- Experience developing algorithms in synthesis, physical design, or sign-off. - Hands-on software engineering skills to design algorithms and execute large-scale experiments. - Experience delivering production-grade software or shipping products in chip design or AI.

Skills: EDA algorithms, physical design, synthesis, sign-off, AI models

Market context

This role has been open 1 day — well below the 33-day median for EDA/CAD Engineering roles.

EDA/CAD Engineering · AI EDA Design

Open roles in category
72
Median days open
33 d
Median salary
$209k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Ricursive Intelligence compares in EDA/CAD Engineering hiring
Metric Ricursive Intelligence All employers we track in this specialty (72 roles · 25 employers)
Open roles in this specialty 3 72
Open roles in the wider Physical Implementation family 4 1530 · 112 employers
Median days open 1 d 33 d (−32 d vs this employer)
Median salary (USD postings) — $209k

Skills observed across this category: EDA algorithms, physical design, synthesis, sign-off, AI models

Who's hiring in this category

  • NXP Semiconductors · 12 open roles · median 75 d
  • NVIDIA · 8 open roles · median 33 d
  • Keysight Technologies · 7 open roles · median 27 d
  • Synopsys · 6 open roles · median 10 d
  • Cadence Design Systems · 5 open roles · median 80 d
  • Qualcomm · 4 open roles · median 27 d

How we counted: 72 open EDA/CAD Engineering (AI EDA Design) roles from 25 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Apply now
Palo Alto, United States
On-site
Full-time
6 days ago

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