Director, Package Development - Tempe, AZ, United States
Originally posted 7 August 2026 by the employer.
About the role
This role provides strategic and technical leadership for the development and commercialization of advanced wafer-based IC package platforms, including HDFO, 2.5D, and chiplet-based architectures.
What you'll do
- Lead strategic customer engagements and development programs with Tier 1 customers, aligning customer requirements with technology roadmaps. - Coordinate development activities with global R&D teams to execute advanced packaging programs through qualification and initial production ramp. - Serve as the senior technical and program interface for customer meetings, executive reviews, issue resolution, and follow-up actions. - Guide technical tradeoff decisions covering package architecture, wafer process integration, design rules, materials, reliability, manufacturability, cost, schedule, and yield risk. - Partner with ecosystem collaborators and wafer processing suppliers to influence technology choices, supplier readiness, and roadmap direction.
What you'll need
- Bachelor's degree in Engineering. - 10+ years of experience in semiconductor package development, wafer-level packaging, IC packaging, or wafer process technology. - Technical background in IC package architecture, package design environments, wafer process integration, design-rule tradeoffs, and manufacturability considerations. - Working knowledge of IC packaging materials, failure modes, reliability qualification, process characterization, and production ramp requirements. - Experience leading cross-functional teams and managing direct technical engagements with semiconductor, computing, networking, AI, or mobile customers. - Ability to travel 10-20% domestically and internationally.
Nice to have
- Master's degree or Ph.D. in Engineering. - Expertise in high-density fan-out, 2.5D integration, chiplet module architectures, bridge-like constructions, advanced substrate technologies, or heterogeneous integration. - Experience taking advanced package technologies from concept through qualification and early production ramp. - Familiarity with cost modeling, yield improvement, design-for-manufacturing, and technology roadmap planning. - Experience working with global R&D teams, OSAT operations, foundries, fabless semiconductor companies, or major system customers.
Skills: advanced packaging, fan-out, 2.5D, heterogeneous integration, wafer process integration
This role has been open 0 days — well below the 62-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
297
|
Median days open
62 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Amkor | All employers we track in this specialty (297 roles · 59 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 297 |
| Open roles in the wider Process, Fab & Equipment family | 51 | 10278 · 109 employers |
| Median days open | 0 d | 62 d (−62 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: advanced packaging, fan-out, 2.5D, heterogeneous integration, wafer process integration
Who's hiring in this category
- KLA Corporation · 42 open roles · median 139 d
- Micron Technology · 41 open roles · median 43 d
- Intel Corporation · 21 open roles · median 34 d
- Renesas Electronics · 19 open roles · median 44 d
- GlobalFoundries · 14 open roles · median 71 d
- Lumilens · 13 open roles · median 82 d
How we counted: 297 open Packaging Engineering (Advanced Packaging) roles from 59 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.