Director of Silicon Validation

Own the complete verification and validation lifecycle of AI inference silicon, from pre-silicon functional verification to post-silicon bring-up.

About the role

This role involves owning the complete verification and validation lifecycle of AI inference silicon, from pre-silicon functional verification, through hardware emulation, to post-silicon bring-up and production validation. This leader defines if the design is correct and how to verify it.

What you'll do

• Lead and grow pre-silicon design verification, hardware emulation, and post-silicon validation and bring-up disciplines.
• Own the verification strategy, test plans, and coverage closure criteria for tape-out, providing data-driven readiness recommendations.
• Define content strategy across simulation, emulation, FPGA prototyping, and silicon to maximize bug discovery.
• Build and scale the emulation environment to enable firmware and software bring-up ahead of first silicon.
• Establish post-silicon bring-up plans, lab infrastructure, and on-chip observability and debug strategy.
• Drive bug triage, root cause analysis, escape analysis, errata management, and make respin-versus-workaround recommendations.
• Partner with design, DFT, physical design, firmware, and software teams for verification intent and debug hooks.
• Own regression infrastructure, compute and license capacity planning, and continuous integration for verification and emulation workloads.
• Manage relationships with EDA and emulation vendors, verification IP suppliers, and third-party IP providers.
• Recruit, mentor, and develop a high-performing verification and validation organization.

What you'll need

• Degree in Electrical Engineering, Computer Engineering, or a related field.
• 12+ years of experience in ASIC verification and/or silicon validation, including at least 5 years in a leadership role.
• Proven track record taking multiple complex ASICs from verification planning through successful first silicon and production ramp.
• Deep hands-on expertise in SystemVerilog, UVM, constrained-random verification, functional coverage, and assertion-based verification.
• Demonstrated ownership of a hardware emulation platform (Cadence Palladium, Siemens Veloce, or Synopsys ZeBu), including model build flows, capacity and partitioning, transactors, and co-emulation.
• Experience leading post-silicon bring-up, including first power-on, boot, interface training, characterization, and silicon debug.
• Strong understanding of high-speed interface and memory subsystem validation, including PCIe, LPDDR/HBM, SerDes, and coherent interconnect.
• Working knowledge of DFT, ATPG, and MBIST, and how test structures interact with verification and bring-up.
• Experience defining verification sign-off criteria and presenting readiness data to executive stakeholders.
• Excellent leadership, communication, and cross-functional collaboration skills.

Nice to have

• Experience verifying and validating AI/ML accelerators, high-performance computing (HPC), or data center silicon.
• Firmware or embedded software bring-up experience, including booting a bootloader or Linux on emulation or first silicon.
• Hands-on deployment of formal verification methodology alongside simulation-based verification.
• Experience with Arm-based subsystems and coherent mesh interconnects.
• Familiarity with virtual prototyping, performance validation, and correlating silicon results to pre-silicon models.
• Track record building verification automation and applying AI-assisted tooling to verification and debug workflows.
• Experience scaling a validation organization across multiple geographic sites.
• Successful track record of technology development within a dynamic start-up environment.

More semiconductor jobs: Test engineer jobs · Austin jobs