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NXP Semiconductors

Digital Physical Design (P&R) Intern - Chandler (Office), United States

NXP Semiconductors Chandler (Office), United States Internship 3 months ago
Physical Design & EDA

Originally posted 13 July 2026 by the employer.

Execute digital backend flows from synthesis to GDS2 using Cadence tools.

About the role

This internship role focuses on digital backend flow execution from synthesis to GDS2 within physical design. The position is based in NXP's Chandler, Arizona office.

What you'll do

- Understand the existing flow, tools, and scripts to execute digital backend flow from synthesis to GDS2 using Cadence tools. - Support multiple parallel runs to experiment with different RTL implementations and tool options to find the most area-optimal solution. - Study Cadence tools' user manuals and user-forum discussions to suggest improvements to existing flows and scripts that enhance backend flow quality and efficiency.

What you'll need

- Currently pursuing a Master's degree (MSEE) with the majority of coursework relevant to digital design, RTL, and digital backend flow. - Willingness to relocate to the Phoenix Metro area (Arizona) for the full duration of the internship. - Ability to maintain a minimum 3 days per week full-day presence in NXP's Chandler office.

Skills: Digital backend flow, Synthesis, GDS2, Cadence tools, RTL implementations, Digital Design

Market context

This role has been open 99 days — well above the 61-day median for Physical Design roles.

Physical Design · Physical Design

Open roles in category
657
Median days open
61 d
Median salary
$187k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NXP Semiconductors compares in Physical Design hiring
Metric NXP Semiconductors All employers we track in this specialty (657 roles · 79 employers)
Open roles in this specialty 24 657
Open roles in the wider Physical Implementation family 45 1441 · 110 employers
Median days open 27 d 61 d (−34 d vs this employer)
Median salary (USD postings) — $187k

Skills observed across this category: Digital backend flow, Synthesis, GDS2, Cadence tools, RTL implementations, Digital Design

Who's hiring in this category

  • Qualcomm · 120 open roles · median 43 d
  • AMD · 61 open roles · median 26 d
  • Synopsys · 38 open roles · median 34 d
  • NVIDIA · 37 open roles · median 70 d
  • Intel Corporation · 36 open roles · median 13 d
  • Broadcom · 30 open roles · median 99 d

How we counted: 657 open Physical Design (Physical Design) roles from 79 employers tracked in the SemiconductorJobs index, counted 20 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Apply now
Chandler (Office), United States
On-site
Internship
3 months ago

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