Design Verification Engineer - Mountain View, CA, United States
$175,000 - $362,500 USD yearly
Originally posted 15 July 2026 by the employer.
About the role
MatX is seeking silicon verification engineers responsible for delivering performant and functionally accurate silicon across compute, memory management, and high-speed connectivity.
What you'll do
- Contribute to MatX’s verification methodology with a scalable solution across blocks, subsystems, fullchip, and system-level validation. - Own portions of verification execution at subsystem and chip-level, creating testbenches, tests, and related artifacts to achieve structural and functional coverage closure. - Plan and drive intermediate and sign-off reviews on verification test plans, execution progress, and verification closure towards silicon milestones including design freeze and tapeout.
What you'll need
- Concept-to-silicon experience driving verification from an architecture and/or design specification to production silicon. - Experience with SystemVerilog, Python, C/C++, Bluespec, and similar scripting and programming languages for verification and silicon modeling. - Production experience with advanced verification methodologies such as UVM and assertion-based verification (ABV), alongside experience with formal and simulated verification. - Production experience creating portable tests and drivers for verification applied to silicon validation and post-silicon debug. - Understanding of silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, and memory management.
Nice to have
- Familiarity with emulation and prototyping platforms and methodologies. - Hands-on experience with participation in silicon debug and bring-up.
Skills: verification methodology, SystemVerilog, UVM, assertion-based verification, silicon milestones, coverage closure
This role has been open 96 days — well above the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1214
|
Median days open
64 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | MatX | All employers we track in this specialty (1214 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 1214 |
| Open roles in the wider Digital Design & Verification family | 30 | 3244 · 116 employers |
| Median days open | 60 d | 64 d (−4 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: verification methodology, SystemVerilog, UVM, assertion-based verification, silicon milestones, coverage closure
Who's hiring in this category
- Qualcomm · 113 open roles · median 40 d
- AMD · 96 open roles · median 53 d
- NVIDIA · 84 open roles · median 61 d
- Synopsys · 65 open roles · median 35 d
- SiFive · 55 open roles · median 77 d
- Cadence Design Systems · 50 open roles · median 119 d
How we counted: 1214 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 20 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.