CPU Synthesis CAD Engineer - Santa Clara, California, United States of America
$198,700 - $298,100 USD yearly
Originally posted 8 May 2026 by the employer.
About the role
As a CPU Synthesis CAD Engineer, you will build and support synthesis and implementation tools and flows for custom CPUs.
What you'll do
- Develop, integrate, and release new features in the high-performance synthesis CAD flow. - Architect and recommend methodology improvements to optimize power, performance, and area. - Maintain, support, and debug synthesis and implementation flows, and resolve project-specific issues. - Work closely with worldwide CPU physical design teams to provide synthesis methodology guidance. - Work with EDA vendors to define roadmaps and resolve synthesis tool issues. - Write and review detailed technical documentation across the design lifecycle.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant engineering experience (or Master's degree and 5+ years, or PhD and 4+ years). - Advanced knowledge of computer architecture, micro-architecture, logic design, circuits, and physical design. - Experience solving complex design problems to ensure design completeness, power, and performance.
Nice to have
- 8 years of hands-on experience in synthesis and place-and-route of high-performance chips. - High level of proficiency in Tcl and Python. - Experience with automation. - Experience with front-end tasks including logic and physical synthesis, LEC, UPF, and front-end signoff. - Experience with advanced technology nodes (5nm or lower). - Strong experience with synthesis tools such as Cadence Genus or Synopsys Fusion Compiler. - Proven track record of managing and regressing synthesis flows.
Skills: synthesis CAD flow, power, performance, area, Tcl, Python, Cadence Genus, Synopsys Fusion Compiler
This role has been open 197 days — well above the 71-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
696
|
Median days open
71 d
|
Median salary
$192k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (696 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 39 | 696 |
| Open roles in the wider Physical Implementation family | 170 | 1491 · 109 employers |
| Median days open | 76 d | 71 d (+5 d vs this employer) |
| Median salary (USD postings) | — | $192k |
Skills observed across this category: synthesis CAD flow, power, performance, area, Tcl, Python, Cadence Genus, Synopsys Fusion Compiler
Who's hiring in this category
- Cadence Design Systems · 155 open roles · median 152 d
- Synopsys · 62 open roles · median 43 d
- Micron Technology · 44 open roles · median 52 d
- GlobalFoundries · 39 open roles · median 26 d
- Qualcomm (this employer) · 39 open roles · median 76 d
- Keysight Technologies · 34 open roles · median 79 d
How we counted: 696 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.