$100,000 - $189,750 USD yearly
Originally posted 9 July 2026 by the employer.
About the role
As an ASIC Design Engineer on the GPU Design team, you will implement, document, and deliver RTL to achieve performance, area, and power targets. You will work across IP blocks including GPU work schedulers, time distribution systems, interrupt controllers, and DMA engines.
What you'll do
- Implement, document, and deliver high-performance, area-, and power-efficient RTL to achieve design targets and specifications.
- Analyze architectural trade-offs based on features, performance requirements, and system limitations.
- Define micro-architecture, implement in RTL, and deliver verified, synthesis- and timing-clean designs.
- Coordinate with architects, verification teams, synthesis, timing, and back-end teams throughout development.
- Work on IPs including the GPU work scheduler, time distribution system, interrupt controllers, and DMA engines.
- Architect features to assist silicon debug and support post-silicon validation activities.
What you'll need
- Bachelor's degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
- Experience in micro-architecture and RTL development using Verilog.
- Understanding of the ASIC design flow, including RTL design, verification, logic synthesis, and timing analysis.
- Exposure to digital systems, VLSI design, computer architecture, and computer arithmetic.
Skills: micro-architecture, RTL, Verilog, ASIC design flow, post-silicon validation
More semiconductor jobs: NVIDIA jobs · RTL design jobs · California jobs
This role has been open 113 days — well above the 58-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1050
|
Median days open
58 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1050 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 1050 |
| Open roles in the wider Digital Design & Verification family | 257 | 3354 · 114 employers |
| Median days open | 67 d | 58 d (+9 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: micro-architecture, RTL, Verilog, ASIC design flow, post-silicon validation
Who's hiring in this category
- Qualcomm · 142 open roles · median 67 d
- Synopsys · 87 open roles · median 44 d
- AMD · 81 open roles · median 45 d
- NXP Semiconductors · 44 open roles · median 99 d
- Analog Devices · 42 open roles · median 46 d
- Intel Corporation · 34 open roles · median 22 d
How we counted: 1050 open Digital/RTL Design (RTL Design) roles from 99 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.