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Astera Labs

Analog Mixed-Signal Layout Intern - Singapore

Astera Labs Singapore Internship 2 months ago
Analog & Mixed-Signal Design

Originally posted 4 August 2026 by the employer.

About the role

This role is for an Analog Mixed-Signal Layout Intern to assist in the design and layout of high-performance analog and mixed-signal IP blocks. You will gain hands-on experience with advanced technology nodes and CAD tools, translating schematic designs into silicon.

What you'll do

  • Assist in layout design of analog and mixed-signal circuits (e.g., current mirrors, differential pairs, op-amps, bandgaps, comparators).
  • Perform layout-vs-schematic (LVS), design-rule checks (DRC), and parasitic extraction (PEX).
  • Support floor planning, placement, routing, and matching for analog blocks.
  • Work with circuit designers to optimize layout for performance, area, and reliability.
  • Document layout work and contribute to layout review checklists and verification reports.

What you'll need

  • Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Basic understanding of analog/mixed-signal IC design concepts.
  • Familiarity with EDA tools such as Cadence Virtuoso, Synopsys, or Mentor Graphics.
  • Basic understanding of matching techniques, layout symmetry, and common centroid structures.
  • Eagerness to learn advanced layout methodologies for high-speed and low-noise analog design.

Nice to have

  • Experience with version control systems (e.g., Git, Perforce).
  • Knowledge of CMOS, FINFET devices structure.
  • Familiarity with analog layout techniques and parasitic extraction.

Skills: Analog Mixed-Signal Layout, LVS, DRC, parasitic extraction, Cadence Virtuoso

Apply now
Singapore
On-site
Internship
2 months ago

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