Analog/Mixed Signal IC Design Engineer (Principal/Staff) - Singapore-Yishun, Singapore
Originally posted 21 July 2026 by the employer.
About the role
This role involves the development of high speed analog, mixed-signal IPs, including HBM and UCIe, using the A14, 2nm, and 3nm CMOS technology.
What you'll do
- Design, pre-layout, and post-layout verification of integrated circuits.
- Develop circuit schematics, perform detailed layout reviews, and conduct necessary verification/simulations.
- Optimize circuits in high speed paths for low jitter and low power.
- Conduct design reviews and create documentation.
- Assist with IP integration into SOCs.
- Provide guidance to validation engineers or participate in initial silicon bring-up, debug, and characterization.
What you'll need
- Extensive experience designing high-speed custom analog and digital circuits in areas like Serdes, HBM, and UCIe.
- Familiarity with Cadence Virtuoso tool suite, including Virtuoso schematic capture and layout, Spectre circuit simulator, and Virtuoso Analog Design Environment (ADE) – Explorer, Assembler.
- Design experience in advanced CMOS nodes.
- Bachelor/Master/PhD in Electrical/Electronic Engineering with 10+ years of related experience.
Nice to have
- FinFET design experience.
- Ability to perform Matlab, AMI, or 3D modeling of highspeed design.
- Knowledge of industry standard interface specification.
Skills: high speed analog, mixed-signal IPs, HBM, UCIe, Serdes
This role has been open 70 days — below the 76-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
239
|
Median days open
76 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (239 roles · 49 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 239 |
| Open roles in the wider Analog & Mixed-Signal family | 42 | 1385 · 108 employers |
| Median days open | 162 d | 76 d (+86 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: high speed analog, mixed-signal IPs, HBM, UCIe, Serdes
Who's hiring in this category
- AMD · 28 open roles · median 64 d
- Synopsys · 26 open roles · median 44 d
- Qualcomm · 20 open roles · median 58 d
- Cadence Design Systems · 18 open roles · median 181 d
- Apple · 12 open roles · median 7 d
- NVIDIA · 11 open roles · median 116 d
How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.