Analog Layout Intern - Pavia, Italy
Originally posted 4 September 2026 by the employer.
About the role
This Analog Layout Intern role involves learning and applying IC layout development CAD and physical verification tools.
What you'll do
- Learn the use of IC layout development CAD and physical verification tools.
- Train on Mask/layout design using Cadence Virtuoso EXL/Custom Compiler Synopsys with circuit design input.
- Learn design rules of advanced CMOS technology nodes (16nm to 3nm).
- Run DRC/LVS checks.
- Learn Electromigration/IR drop (EMIR) concepts for analog IC layout.
- Optimize layout designs in terms of area and parasitic R,C.
What you'll need
- Student of Electronics or a similar technical field, enrolled at an accredited Italian university OR a Bachelor/Master graduate.
- Fundamental understanding of base electronic concepts.
- Understanding of circuit elements like diode, transistor, capacitor, and resistor.
- Understanding of basic digital fundamentals: latches, flip-flops, and combinatorial logic.
- Fluency in English and enough Italian.
- Eligible to work in the country of hire without restrictions.
Nice to have
- Specialized coursework in analog design or layout.
Skills: IC layout, Cadence Virtuoso, DRC/LVS, CMOS technology nodes, Electromigration/IR drop
This role has been open 24 days — below the 25-day median for Analog IC Design roles.
Analog IC Design · Analog Layout
|
Open roles in category
46
|
Median days open
25 d
|
Median salary
—
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (46 roles · 21 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 46 |
| Open roles in the wider Analog & Mixed-Signal family | 18 | 1393 · 107 employers |
| Median days open | 15 d | 25 d (−10 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: IC layout, Cadence Virtuoso, DRC/LVS, CMOS technology nodes, Electromigration/IR drop
Who's hiring in this category
- Celero · 8 open roles · median 31 d
- Analog Devices · 6 open roles · median 11 d
- Broadcom · 3 open roles · median 7 d
- Marvell Technology (this employer) · 3 open roles · median 24 d
- onsemi · 3 open roles · median 34 d
- QORVO · 3 open roles · median 32 d
How we counted: 46 open Analog IC Design (Analog Layout) roles from 21 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.