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Marvell Technology

Analog IC Design Intern - Master's Degree - Hsinchu City, Taiwan

Marvell Technology Hsinchu City, Taiwan Internship 2 months ago
Analog & Mixed-Signal Design

Originally posted 6 August 2026 by the employer — open 35 days.

About the role

This role is for an Analog design engineer responsible for the design, verification, and evaluation of SerDes circuits in high-speed data communication ICs. The team provides Analog Mixed-Signal IPs for SerDes PHY at advanced technology nodes such as 5nm and 3nm.

What you'll do

  • Develop high-speed and high-performance Analog SerDes.
  • Participate in SerDes design verification across different application and PVT.
  • Provide instructions to layout engineers.

What you'll need

  • Currently pursuing a MS/PHD degree in CS/EE or related technical fields.
  • Familiarity with CAD tools for simulations and layouts.
  • Proficiency in fundamental analog circuit design, including Opamp, regulator, or Bandgap.
  • Proficiency in high speed SERDES design, including CTLE, Driver, Demux, or MUX.
  • Proficiency in high frequency clock design, including PLL or Clock delivery.

Skills: High-speed SerDes, Analog SerDes, design verification, Opamp, regulator, PLL

Market context

This role has been open 178 days — well above the 91-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
217
Median days open
91 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Marvell Technology compares in High-Speed IO/SerDes Design hiring
Metric Marvell Technology All employers we track in this specialty (217 roles · 44 employers)
Open roles in category 5 217
Median days open 178 d 91 d (+87 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: High-speed SerDes, Analog SerDes, design verification, Opamp, regulator, PLL

Who's hiring in this category

  • AMD · 24 open roles · median 61 d
  • Cadence Design Systems · 19 open roles · median 153 d
  • Qualcomm · 17 open roles · median 74 d
  • Synopsys · 16 open roles · median 53 d
  • Broadcom · 11 open roles · median 142 d
  • NVIDIA · 10 open roles · median 95 d

How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Apply now
Hsinchu City, Taiwan
On-site
Internship
2 months ago

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