Skip to main content
Synopsys

Analog Design, Staff Engineer

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Moreira, Portugal 6 months ago
Analog & Mixed-Signal Design

Originally posted 8 April 2026 by the employer — open 155 days. Relisted by the employer on 31 August 2026.

Design and develop analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.

About the role

This role involves the design and development of analog circuits for high-speed communication systems. You will focus on integrated circuits for SerDes products supporting Ethernet and PCIe standards.

What you'll do

  • Design and develop medium complexity analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.
  • Define and plan analog design activities, setting clear milestones and deliverables.
  • Prepare and conduct technical design reviews, identifying improvements and tracking actions.
  • Evaluate and minimize the impact of layout parasitic effects by collaborating with layout teams, optimizing circuit performance, power, and area.
  • Perform silicon correlation with simulation results, analyzing discrepancies and driving design refinements.
  • Engage with a global, multi-cultural, and cross-functional R&D team.

What you'll need

  • M.Sc. degree in Electrical Engineering with 3+ years of experience, or Ph.D. in Electrical Engineering with 1.5+ years of experience.
  • Background in CMOS analog circuit design, including ADC, DAC, PLL, Rx, Tx, References, or related areas.
  • Familiarity with industry-standard IC design packages and EDA tools.
  • Experience working in UNIX operating systems.
  • Good written and verbal communication skills in English.

Nice to have

  • System-level knowledge of SerDes architecture.

Skills: SerDes products, Ethernet, PCIe, CMOS analog circuit design, ADC, DAC, PLL

Market context

This role has been open 153 days — well above the 91-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
217
Median days open
91 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Synopsys compares in High-Speed IO/SerDes Design hiring
Metric Synopsys All employers we track in this specialty (217 roles · 44 employers)
Open roles in category 16 217
Median days open 53 d 91 d (−38 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: SerDes products, Ethernet, PCIe, CMOS analog circuit design, ADC, DAC

Who's hiring in this category

  • AMD · 24 open roles · median 61 d
  • Cadence Design Systems · 19 open roles · median 153 d
  • Qualcomm · 17 open roles · median 74 d
  • Synopsys (this employer) · 16 open roles · median 53 d
  • Broadcom · 11 open roles · median 142 d
  • NVIDIA · 10 open roles · median 95 d

How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Synopsys

Synopsys

Apply now
img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Moreira, Portugal
On-site
6 months ago

Share this job