Analog Design, Sr Staff Engineer - 17402

Originally posted 27 May 2026 by the employer — open 106 days.

About the role

This role involves developing high-speed Multi-Gbps NRZ and PAM4 SerDes IP, focusing on advanced process nodes such as FinFET.

What you'll do

• Review SerDes standards and define transceiver architectures and analog sub-block specifications.
• Develop advanced circuit solutions to improve power, area, speed, and silicon robustness.
• Collaborate with analog, digital, and layout teams for efficient design, verification, and implementation.
• Guide physical layout to minimize parasitics, device stress, and process variation.
• Define and execute design and verification strategies using industry-standard simulation tools.
• Present technical results and design tradeoffs to internal teams, customers, and stakeholders.

What you'll need

• M.A.Sc. with 8+ years or PhD with 6+ years of relevant analog/mixed-signal IC design experience.
• Strong background in circuit/system modeling, analog design, DSP, and communications theory.
• Proven experience with Multi-Gbps SerDes architectures, including TX, RX, equalizers, samplers, drivers, serializers/deserializers, PLLs, DLLs, bandgaps, regulators, oscillators, ADCs, and DACs.
• Experience with analog/digital co-design, calibration, adaptation, and timing handoff.
• Familiarity with ESD design, custom high-speed digital logic, and reliability considerations such as EM, IR, aging, and self-heating.
• Proficiency in schematic entry, physical layout, SPICE simulation, and Verilog-A modeling.
• Strong understanding of jitter, noise, signal integrity, parasitics, crosstalk, and design-for-reliability principles.

Skills: Multi-Gbps SerDes IP, NRZ, PAM4, FinFET, circuit architecture, analog design