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Intel Corporation

Analog Circuit Design Engineer - Bangalore, India

Intel Corporation India, Bangalore, India 3 months ago
Analog & Mixed-Signal Design

Originally posted 3 July 2026 by the employer — open 69 days.

About the role

This role involves designing, developing, and optimizing high-speed analog circuits in advanced process nodes, contributing to memory interface PHYs.

What you'll do

  • Design, develop, and build analog circuits for advanced process nodes.
  • Perform circuit design, validation, extraction of chip parameters, and simulation of analog behavior models.
  • Optimize circuits for power efficiency, performance, area, timing, and yield goals.
  • Create test plans to verify designs against block microarchitecture specifications and evaluate test results.
  • Collaborate with cross-functional teams to define design specifications, collect feedback, and resolve design issues.
  • Conduct layout reviews and ensure optimal placement and routing.

What you'll need

  • Bachelor's degree in Electrical Engineering or equivalent specialized field.
  • 10+ years with Master's degree, or 4+ years with PhD in analog circuit design.
  • Proficiency with industry-standard tools such as Cadence Virtuoso, Spectre, PrimeSim, HSPICE, ADE, and Custom Compiler.
  • Expertise in designing high-speed analog circuits such as TX/RX blocks, PLLs, DLLs, SerDes, and voltage regulators.
  • Strong fundamentals in CMOS design, circuit simulation, and high-speed analog design concepts.
  • Familiarity with DRC, LVS, and post-layout extraction tools.

Nice to have

  • Experience in post-silicon debug, electrical validation, and correlating measurements to simulations.
  • Knowledge of scripting languages such as TCL, Perl, Python, or C for design automation tasks.
  • Familiarity with modeling and simulation of high-speed interface interconnects and channels.

Skills: high-speed analog circuits, memory interface PHYs, analog circuit design, Cadence Virtuoso, Spectre, HSPICE

Market context

This role has been open 132 days — well above the 91-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
217
Median days open
91 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Intel Corporation compares in High-Speed IO/SerDes Design hiring
Metric Intel Corporation All employers we track in this specialty (217 roles · 44 employers)
Open roles in category 7 217
Median days open 132 d 91 d (+41 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: high-speed analog circuits, memory interface PHYs, analog circuit design, Cadence Virtuoso, Spectre, HSPICE

Who's hiring in this category

  • AMD · 24 open roles · median 61 d
  • Cadence Design Systems · 19 open roles · median 153 d
  • Qualcomm · 17 open roles · median 74 d
  • Synopsys · 16 open roles · median 53 d
  • Broadcom · 11 open roles · median 142 d
  • NVIDIA · 10 open roles · median 95 d

How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.

Apply now
India, Bangalore, India
On-site
3 months ago

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