Analog Circuit Design Engineer - Bangalore, India
Analog & Mixed-Signal Design
Originally posted 5 August 2026 by the employer — open 36 days. Relisted by the employer on 7 September 2026.
About the role
This role involves designing, developing, and building analog circuits in advanced process nodes for analog and mixed-signal IPs.
What you'll do
- Design floorplans, perform circuit design, and extract chip parameters.
- Simulate analog behavior models and create test plans to verify designs.
- Optimize circuits for power, performance, area, timing, and yield goals.
- Collaborate with cross-functional teams to report design progress and resolve design issues.
- Optimize performance, power, and area, and reduce leakage of circuits.
- Work with architecture and layout teams for functionality, robustness, and electrical capabilities.
What you'll need
- Master's degree or PhD in Electrical Engineering or a STEM-related degree with analog and mixed-signal circuit design experience.
- 1 year of school experience or knowledge with tools for schematic entry, IC layout, and SPICE simulation.
- 1 year of school experience or knowledge in designing mixed signal circuits including DACs, RX, TX, PLLs, Filters, bias circuits, regulators, and other analog circuits.
Nice to have
- Knowledge of Verilog A for analog behavioral modeling, TCL, Perl, C, python or other scripting languages.
- Awareness of industry standard design conventions and rules in analog circuit design.
- Awareness of techniques to reduce design risk.
Skills: high-speed IO circuits, SerDes, LPDDR, DDR, HBM, CMOS design
Market context
This role has been open 132 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 7 | 217 |
| Median days open | 132 d | 91 d (+41 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: high-speed IO circuits, SerDes, LPDDR, DDR, HBM, CMOS design
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.