Analog CAD Engineer - Santa Clara, California, United States
$110,000 - $145,000 USD yearly
Originally posted 4 February 2026 by the employer.
Support and optimize custom IC design flows across Cadence Virtuoso and Calibre tools.
About the role
Support and enhance the Analog CAD design flow across the full custom IC design cycle, including schematic, layout, simulation, and physical verification using Cadence Virtuoso and Calibre tools.
What you'll do
- Support and optimize Analog CAD flows on the Cadence Virtuoso platform, including Schematic, Layout, and ADE. - Work with PDKs from multiple foundries to ensure correct setup and improve design efficiency. - Develop and maintain scripts and automation to streamline analog design workflows. - Provide support for Calibre verification flows, including DRC, LVS, and PEX rule decks. - Collaborate with analog designers to troubleshoot tool, flow, and PDK-related issues.
What you'll need
- BSEE degree. - 2+ years of experience in Analog CAD development or support. - Hands-on experience with Cadence Virtuoso or Synopsys Custom Compiler. - Familiarity with Calibre rule decks and physical verification flows. - Experience enhancing analog design efficiency through flow or automation improvements. - Business-level English communication skills.
Nice to have
- Python, Perl, or other scripting experience. - Experience with multiple PDKs.
Skills: Cadence Virtuoso, PDK, Calibre, DRC, LVS, Perl, Python
This role has been open 191 days — well above the 71-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
696
|
Median days open
71 d
|
Median salary
$192k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | OmniVision | All employers we track in this specialty (696 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 696 |
| Open roles in the wider Physical Implementation family | 1 | 1491 · 109 employers |
| Median days open | 191 d | 71 d (+120 d vs this employer) |
| Median salary (USD postings) | — | $192k |
Skills observed across this category: Cadence Virtuoso, PDK, Calibre, DRC, LVS, Perl
Who's hiring in this category
- Cadence Design Systems · 155 open roles · median 152 d
- Synopsys · 62 open roles · median 43 d
- Micron Technology · 44 open roles · median 52 d
- GlobalFoundries · 39 open roles · median 26 d
- Qualcomm · 39 open roles · median 76 d
- Keysight Technologies · 34 open roles · median 79 d
How we counted: 696 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.