Advanced IC Packaging - Staff Engineer - Irvine, CA, United States

Join Skyworks' Advanced IC Packaging team.

About the role

This role involves leading thermal and mechanical simulation efforts for advanced semiconductor packaging technologies for wireless products.

What you'll do

• Develop thermo-mechanical finite element models (FEM) of IC packages to evaluate stress, strain, and deformation.
• Setup moldflow simulation models to predict molding process risks like mold fillability and warpage.
• Perform second level reliability simulations to predict solder joint lifetimes under thermal cycling, drop/shock, and cyclic bending.
• Create, maintain, and document simulation methodologies, modeling procedures, automation scripts, and analysis workflows.
• Collaborate with cross-functional teams and external partners to obtain material properties, support design, and resolve challenges.

What you'll need

• BS with 8+ years, MS with 6+ years, or PhD with 3+ years of experience in Mechanical Engineering or a related field with strong background in thermal and mechanical simulation of electronic packages.
• Strong fundamentals in solid mechanics, heat transfer, materials science, and reliability engineering.
• Hands-on experience with finite element analysis (FEA) tools such as ANSYS (APDL and Workbench), Icepak, ABAQUS, FloTHERM, COMSOL, or equivalent simulation platforms.
• Proven experience in IC package modeling and simulation, including stress, strain, warpage, thermal performance, and reliability assessments.
• Experience modeling package assembly processes such as die attach, wire bonding, molding, curing, and board-level assembly, as well as reliability test conditions including thermal cycling, drop/shock, and mechanical bending.
• Familiarity with advanced packaging technologies and manufacturing processes, including SiP, MCM, WLCSP, flip-chip, and dual-sided package architectures.

Nice to have

• Experience with advanced semiconductor packaging technologies such as flip-chip, fan-out, 2.5D/3D packaging, heterogeneous integration, chiplets, and wafer-level packaging.
• Experience modeling package-to-board interactions, PCB warpage, solder joint reliability, and board-level reliability.
• Knowledge of packaging materials, material characterization techniques, and constitutive material modeling, including viscoelastic and temperature-dependent material behavior.
• Experience developing automated simulation workflows using scripting languages such as Python, APDL, MATLAB, or similar tools.
• Familiarity with Design of Experiments (DOE), statistical analysis, and model calibration techniques.
• Experience in RF, BAW/SAW, or power management mobile semiconductor packaging technologies.