2027 Undergrad ASIC Package Engineering Co-op/Intern - CA, San Jose, United States
Originally posted 25 August 2026 by the employer.
Support Package design and Package Development Engineers in prioritizing and optimizing new projects related to advanced packaging technology.
About the role
As an ASIC Package Engineering intern/co-op, you will work with engineers to bring new and advanced packaging technology to reality.
What you'll do
- Support Package design and Package Development Engineers in prioritizing and optimizing new projects.
- Complete substrate, interposer, and bump designs for AMD products, test vehicles, and probe card substrates.
- Implement design verification to ensure design performance, quality, and efficiency.
- Analyze yield and defect metrics to ensure design performance and help improve yield.
- Evaluate and benchmark packaging materials.
What you'll need
- Currently enrolled in a US-based University in a Bachelor's degree program majoring in Electrical Engineering, Engineering Science, Computer Engineering, Mechanical Engineering, Material Science Engineering, or a related field.
- Knowledge or experience with transmission lines and electric circuits.
- Knowledge or experience with Package, silicon, or PCB design software.
- Knowledge or experience with scripting languages (Perl / Python / SQL).
- Knowledge or experience with semiconductor theory and packaging process/technology.
- Knowledge or experience with data analytics and data visualization tools like PowerBI.
Skills: ASIC Package Engineering, advanced packaging technology, substrate, interposer and bump designs, design verification, yield and defect metrics
This role has been open 51 days — slightly above the 43-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
69
|
Median days open
43 d
|
Median salary
$165k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (69 roles · 26 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 69 |
| Median days open | 41 d | 43 d (−2 d vs this employer) |
| Median salary (USD postings) | — | $165k |
Skills observed across this category: ASIC Package Engineering, advanced packaging technology, substrate, interposer and bump designs, design verification, yield and defect metrics
Who's hiring in this category
- Micron Technology · 10 open roles · median 166 d
- AMD (this employer) · 9 open roles · median 41 d
- NVIDIA · 6 open roles · median 37 d
- Marvell Technology · 5 open roles · median 34 d
- Broadcom · 4 open roles · median 137 d
- GlobalFoundries · 4 open roles · median 105 d
How we counted: 69 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 26 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.
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