2027 Masters ASIC Package Engineering Co-op/Intern - CA, Santa Clara, United States
Originally posted 25 August 2026 by the employer.
Work on bringing new and advanced packaging technology to reality for AMD products.
About the role
This role involves supporting Package design and Package Development Engineers in prioritizing and optimizing new projects, and completing substrate, interposer and bump designs. You will work on ASIC Package Engineering for AMD products.
What you'll do
- Support Package design and Package Development Engineers in prioritizing and optimizing new projects
- Complete substrate, interposer and bump designs for AMD products, test vehicles, and probe card substrates
- Implement design verification to ensure design performance, quality, and efficiency
- Analyze yield and defect metrics to ensure design performance and improve yield
- Evaluate and benchmark packaging materials and interact with partners to achieve cost-efficient design and materials
What you'll need
- Currently enrolled in a US based University in a Masters degree program majoring in Electrical Engineering, Engineering Science, Computer Engineering, Mechanical Engineering, Material Science Engineering, or a related field
- Knowledge or experience with transmission lines and electric circuits
- Knowledge or experience with Package, silicon, or PCB design software
- Knowledge or experience with scripting languages: Perl / Python / SQL
- Knowledge or experience with semiconductor theory and packaging process/technology
- Knowledge or experience with data analytics and data visualization tools like powerBI
Skills: ASIC Package Engineering, advanced packaging technology, substrate, interposer and bump designs, yield and defect metrics, packaging materials
This role has been open 51 days — below the 60-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
298
|
Median days open
60 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (298 roles · 59 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 298 |
| Open roles in the wider Process, Fab & Equipment family | 46 | 9867 · 109 employers |
| Median days open | 51 d | 60 d (−9 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: ASIC Package Engineering, advanced packaging technology, substrate, interposer and bump designs, yield and defect metrics, packaging materials
Who's hiring in this category
- KLA Corporation · 43 open roles · median 126 d
- Micron Technology · 37 open roles · median 36 d
- Renesas Electronics · 17 open roles · median 45 d
- Infineon Technologies · 16 open roles · median 64 d
- Intel Corporation · 16 open roles · median 61 d
- GlobalFoundries · 14 open roles · median 58 d
How we counted: 298 open Packaging Engineering (Advanced Packaging) roles from 59 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.
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