Originally posted 6 February 2026 by the employer. Relisted by the employer on 30 October 2026.
About the role
The Director of Physical Design leads and scales the physical implementation organization for ultra-low-power microcontroller (MCU) products. In this role, you will guide a multidisciplinary team across design methodology, physical implementation, and sign-off while collaborating with architecture, RTL design, analog/mixed-signal, verification, and product engineering.
What you'll do
- Define and execute the physical design strategy, methodologies, and automation flows for low-power MCU product lines.
- Build, mentor, and lead a global physical design team while owning implementation schedules, resource allocation, and risk management.
- Oversee full-chip and block-level physical design, including floorplanning, power planning, clock tree synthesis (CTS), place & route (P&R), timing closure, DRC/LVS, EM/IR, and power analysis.
- Partner with architecture, RTL, and analog/mixed-signal teams to evaluate PPA trade-offs and integrate mixed-signal IP into SoCs.
- Interface with foundries on PDK updates, design rules, and process capabilities, and collaborate with product engineering on tape-out readiness, post-silicon debug, and yield.
What you'll need
- Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 15+ years of experience in physical design for complex SoCs, with at least 5 years in leadership roles.
- Proven track record of delivering multiple chips to production.
- Deep expertise in low-power design techniques, including UPF, clock gating, multi-Vt, power gating, DVFS, and retention.
- Hands-on proficiency with physical design tools from Synopsys, Cadence, or Mentor across advanced process nodes (40nm down to 12nm and below).
- Strong understanding of MCU architectures and embedded system constraints.
Nice to have
- Experience with mixed-signal SoCs and integration of analog IP.
- Background in high-volume consumer or industrial MCU products.
- Familiarity with security-focused or safety-certified MCU designs (e.g., ISO 26262).
- Experience building and scaling distributed engineering teams.
Skills: floorplanning, power planning, clock tree synthesis, place & route, timing closure, physical verification
More semiconductor jobs: Physical design jobs · Austin jobs
This role has been open 102 days — well above the 62-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
684
|
Median days open
62 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Ambiq Micro | All employers we track in this specialty (684 roles · 83 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 684 |
| Open roles in the wider Physical Implementation family | 1 | 1548 · 110 employers |
| Median days open | 102 d | 62 d (+40 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: floorplanning, power planning, clock tree synthesis, place & route, timing closure, physical verification
Who's hiring in this category
- Qualcomm · 107 open roles · median 54 d
- AMD · 60 open roles · median 34 d
- Broadcom · 45 open roles · median 69 d
- NVIDIA · 42 open roles · median 78 d
- Synopsys · 36 open roles · median 37 d
- Intel Corporation · 32 open roles · median 24 d
How we counted: 684 open Physical Design (Physical Design) roles from 83 employers tracked in the SemiconductorJobs index, counted 2 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.