WiFi MAC Design - Lead Engineer - Chennai, Tamil Nadu, India
Originally posted 22 September 2026 by the employer — open 0 days.
About the role
This role involves leading the Hardmacro Implementation for WiFi MAC design within a large modem design.
What you'll do
- Lead, train, and mentor junior engineers on complex project execution for large modem designs.
- Work closely with RTL, DFT, and PD leads worldwide from Post-RTL to Netlist release.
- Converge on area, timing, power, and testability for modem designs.
- Write timing constraints, perform synthesis, formal verification, CLP, Primetime, PTPX, and CECO.
- Optimize datapath design for low-area, low-power, and high-speed using advanced synthesis features.
- Handle complex digital blocks with >1M gates in advanced process nodes like 4nm, 5nm, 7nm, or 8nm.
What you'll need
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field and 3+ years of Hardware Engineering or related work experience, OR Master's degree in Computer Science, Electrical/Electronics Engineering, or related field and 2+ years of Hardware Engineering or related work experience, OR PhD in Computer Science, Electrical/Electronics Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- Extensive experience in Synthesis (DC or Genus).
- Extensive experience in Formal Verification (LEC / Formality).
- Extensive experience in Conformal Low Power, PTPX, Primetime, and Conformal ECO.
- Extensive experience in UPF based power intent and synthesis.
- High-speed and Low-power 5G and WLAN Modem Hardmacro Implementation experience.
Skills: WLAN Modem, Hardmacro Implementation, timing constraints, synthesis, formal verification, PTPX
This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
943
|
Median days open
62 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (943 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 146 | 943 |
| Open roles in the wider Digital Design & Verification family | 391 | 3066 · 114 employers |
| Median days open | 50 d | 62 d (−12 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: WLAN Modem, Hardmacro Implementation, timing constraints, synthesis, formal verification, PTPX
Who's hiring in this category
- Qualcomm (this employer) · 144 open roles · median 55 d
- AMD · 62 open roles · median 63 d
- Synopsys · 56 open roles · median 19 d
- NXP Semiconductors · 52 open roles · median 69 d
- NVIDIA · 48 open roles · median 46 d
- Analog Devices · 39 open roles · median 75 d
How we counted: 943 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.